V-Data
AC Characteristics
-5
Parameter
System clock /CAS Latency = 3
Cycle time
/CAS Latency = 2
Symbol
Min
tCK3
tCK2
tCHW
tCLW
tAC3
tAC2
tRC
tRRC
tRCD
tRAS
tRP
tRRD
tCCD
tOH
tDS
tDH
tAS
tAH
tCKS
tCKH
tCS
tCH
tREF
5
1000
7
1.5
1.5
-
-
54
54
14
40
14
10
1
1.5
1.5
1
1.5
1
1.5
1
1.5
1
64
-
-
4.5
5.5
-
-
-
100K
-
-
-
-
-
-
-
-
-
-
-
-
-
60
60
18
42
18
12
1
2
1.5
1
1.5
1
1.5
1
1.5
1
64
7.5
2
2
-
-
5
5.5
-
-
-
100K
-
-
-
-
-
-
-
-
-
-
-
-
-
Clock high pulse width
Clock low pulse width
Access time
form clock
/RAS cycle
time
/CAS Latency = 3
/CAS Latency = 2
Operation
Auto Refresh
Max
Min
6
1000
8
2
2
-
-
65
65
20
42
20
14
1
2
1.5
1
1.5
1
1.5
1
1.5
1
64
-
-
5.5
6
-
-
-
120K
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
Min
7
1000
8
2
2
-
-
65
65
20
42
20
14
1
2
1.5
1
1.5
1
1.5
1
1.5
1
64
-
-
5.5
Max
Min
7
1000
Max
-6
-7
-7.5
VDS6616A4A
Unit Note
ns
ns
ns
ns
1
1
2
6
-
ns
-
-
120K
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
1
1
1
1
1
1
1
1
/RAS to /CAS delay
/RAS active time
/RAS precharge time
/RAS to /RAS bank active delay
/CAS to /CAS delay
Data – out hold time
Data – input setup time
Data – input hold time
Address setup time
Address hold time
CKE setup time
CKE hold time
Command setup time
Command hold time
Refresh time
Note :
1. Assume tR / tF (input rise and fall time) is 1 ns.
2. Access times to be measured with input signals of 1v / ns edge rate.
3.A new command can be given tRRC after self refresh exit.
Rev 1.1 April, 2001
6
A-DATA [ A-DATA TECHNOLOGY ]
