欢迎访问ic37.com |
会员登录 免费注册
发布采购

IMP5218CDW 参数 Datasheet PDF下载

IMP5218CDW图片预览
型号: IMP5218CDW
PDF下载: 下载PDF文件 查看货源
内容描述: 9 - Liine Pllug和Pllay SCSII Termiinattor [9--Liine Pllug and Pllay SCSII Termiinattor]
分类和应用: 驱动程序和接口接口集成电路
文件页数/大小: 10 页 / 298 K
品牌: A1PROS [ A1 PROS CO., LTD. ]
 浏览型号IMP5218CDW的Datasheet PDF文件第2页浏览型号IMP5218CDW的Datasheet PDF文件第3页浏览型号IMP5218CDW的Datasheet PDF文件第4页浏览型号IMP5218CDW的Datasheet PDF文件第5页浏览型号IMP5218CDW的Datasheet PDF文件第6页浏览型号IMP5218CDW的Datasheet PDF文件第7页浏览型号IMP5218CDW的Datasheet PDF文件第8页浏览型号IMP5218CDW的Datasheet PDF文件第9页  
IMP51 1 1/51 1 2
IMP52 8
D
ATA
C
OMMUNICATIONS
9-Line Plug and Play
SCSI Terminator
The 9-channel IMP5218 SCSI terminator is part of IMP's family of high-
performance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
The IMP5218 has two disconnect pins for SCSI Plug and Play (PnP)
applications.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5218.
The IMP5218 architecture tolerates marginal system designs. A key
improvement offered by the IMP5218 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to rec-
ommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
For portable and configurable peripherals, the IMP5218 can be placed in
a sleep mode with two disconnect signals. When disabled, the quiescent
current is typically 375µA, and the outputs are in a high impedance state.
Key Features
x
SCSI plug and play
— Dual disconnect pins
— Logic LOW disconnects lines
x
Hot swap compatible
x
Ultra-Fast response for Fast-20 SCSI applications
x
35MHz channel bandwidth
x
3.5V operation
x
Less than 3pF output capacitance
x
375µA disable-mode current
x
Thermally self limiting
x
No external compensation capacitors
x
Implements 8-bit or 16-bit (wide) applications
x
Compatible with active negation drivers
(60mA/channel)
x
Compatible with passive and active terminations
x
Approved for use with SCSI 1, 2, 3 and UltraSCSI
Block Diagrams
Term Power
Thermal
Limiting
Circuit
Current
Biasing
Circuit
24mA Current
Limiting Circuit
DATA OUTPUT
PIN DB (0)
2.85V
DISCONNECT 1
DISCONNECT 2
1 of 9 Channels
5218_01.eps
© 2000 IMP, Inc.
Data Communications
1