欢迎访问ic37.com |
会员登录 免费注册
发布采购

IMP805LEPA 参数 Datasheet PDF下载

IMP805LEPA图片预览
型号: IMP805LEPA
PDF下载: 下载PDF文件 查看货源
内容描述: 微处理器电源Supplly Superviissor wiitth Battttery备份Swiittch [μP Power Supplly Superviissor wiitth Battttery Backup Swiittch]
分类和应用: 电源电路电源管理电路微处理器
文件页数/大小: 10 页 / 227 K
品牌: A1PROS [ A1 PROS CO., LTD. ]
 浏览型号IMP805LEPA的Datasheet PDF文件第1页浏览型号IMP805LEPA的Datasheet PDF文件第2页浏览型号IMP805LEPA的Datasheet PDF文件第4页浏览型号IMP805LEPA的Datasheet PDF文件第5页浏览型号IMP805LEPA的Datasheet PDF文件第6页浏览型号IMP805LEPA的Datasheet PDF文件第7页浏览型号IMP805LEPA的Datasheet PDF文件第8页浏览型号IMP805LEPA的Datasheet PDF文件第9页  
IMP690A , 692A , 802L, 802M, 805L
Pin Description
Pin Number
IMP690A/IMP692A
IMP802L/IMP802M
1
IMP805L
1
Name
V
OUT
Function
Voltage supply for RAM. When V
CC
is above the reset threshold, V
OUT
connects to V
CC
through a P-channel MOS device. If V
CC
falls below the
reset threshold, this output will be connected to the backup supply at
V
BATT
(or V
CC
, whichever is higher) through the MOS switch to provide
continuous power to the CMOS RAM.
+5V power supply input
Ground
Power failure monitor input. PFI is connected to the internal power fail
comparator which is referenced to 1.25V. The power fail output (PFO)
is active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or V
OUT
.
Power-fail output.

is active LOW whenever the PFI pin is less than
PFO
1.25V.
Watchdog input. The WDI input monitors microprocessor activity. An
internal timer is reset with each transition of the WDI input. If WDI is held
HIGH or LOW for longer than the watchdog timeout period, typically 1.6
seconds, RESET (or is asserted for the reset pulse width time,
RESET)
t
RS
, of 140ms, minimum.
Active-LOW reset output. When triggered by V
CC
falling below the reset
threshold or by watchdog timer timeout, RESET (or pulses low
RESET)
for the reset pulse width, t
RS
, typically 200ms. It will remain low if V
CC
is
below the reset threshold (4.65V in the IMP690A/IMP802L and 4.4V in
the IMP692A/IMP802L) and remains low for 200ms after V
CC
rise above
the reset threshold.
Active-HIGH reset output. The inverse of
RESET.
Auxiliary power or backup-battery input. V
BATT
should be connected to
GND if the function is not used. This input has about 40mV of hysteresis
to prevent rapid toggling between V
CC
and V
BATT
.
2
3
4
2
3
4
V
CC
GND
PFI
5
6
5
6
PFO

WDI
7
––––

RESET
––––
8
7
8
RESET
V
BATT
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
V
BATT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6.0V
All Other Inputs* . . . . . . . . . . . . . . . . . . . –0.3V to (V
CC
+ 0.3V)
Input Current at V
CC
. . . . . . . . . . . . . . . . . . 200mA
Input Current at V
BATT
. . . . . . . . . . . . . . . . . 50mA
Input Current at GND . . . . . . . . . . . . . . . . . 20mA
Output Current:
V
OUT
. . . . . . . . . . . . . . . Short circuit protected
All Other Inputs . . . . . . . . . . . . . . . . . . . 20mA
Rate of Rise: V
BATT
and V
CC
. . . . . . . . . . 100V/µs
Continuous Power Dissipation
Plastic DIP (derate 9mW/°C above 70°C) . . . 800mW
SO (derate 5.9mW/°C above 70°C) . . . . . . . . 500mW
CerDIP (derate 8mW/°C above 70°C) . . . . . . 650mW
Operating Temperature Range (C Devices) . . . . 0°C to 70°C
Operating Temperature Range (E Devices) . . . . –40°C to 85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . –65°C to 160°C
Lead Temperature Soldering, (10 sec) . . . . . . . . 300°C
* The input voltage limits on PFI and WDI may be exceeded if the
current is limited to less than 10mA
These are stress ratings only and functional operation is not implied.
Exposure to absolute maximum ratings for prolonged time periods may
affect device reliability.
3