AAT3221/2
150mA NanoPower™ LDO Linear Regulator
The power dissipation for a 100mA load occurring
for 91.8% of the duty cycle will be 229.5mW. Now
the power dissipation for the remaining 8.2% of the
duty cycle at the 150mA load can be calculated:
P
D(MAX)
= (V
IN
- V
OUT
)I
OUT
+ (V
IN
x I
GND
)
P
D(150mA)
= (5.0V - 2.5V)150mA + (5.0V x 1.1mA)
P
D(150mA)
= 375mW
P
D(8.2%D/C)
= %DC x P
D(150mA)
P
D(8.2%D/C)
= 0.082 x 375mW
P
D(8.2%D/C)
= 30.75mW
The power dissipation for a 150mA load occurring
for 8.2% of the duty cycle will be 20.9mW. Finally,
the two power dissipation levels can summed to
determine the total true power dissipation under the
varied load:
P
D(total)
= P
D(100mA)
+ P
D(150mA)
P
D(total)
= 229.5mW + 30.75mW
P
D(total)
= 260.25mW
The maximum power dissipation for the AAT3221/2
operating at an ambient temperature of 85°C is
267mW. The device in this example will have a total
power dissipation of 260.25mW. This is within the
thermal limits for safe operation of the device.
Printed Circuit Board Layout
Recommendations
In order to obtain the maximum performance from
the AAT3221/2 LDO regulator, very careful attention
must be considered in regard to the printed circuit
board layout. If grounding connections are not prop-
erly made, power supply ripple rejection and LDO
regulator transient response can be compromised.
The LDO regulator external capacitors C
IN
and
C
OUT
should be connected as directly as possible
to the ground pin of the LDO regulator. For maxi-
mum performance with the AAT3221/2, the ground
pin connection should then be made directly back
to the ground or common of the source power sup-
ply. If a direct ground return path is not possible
due to printed circuit board layout limitations, the
LDO ground pin should then be connected to the
common ground plane in the application layout.
14
3221.2005.12.1.11
AAT [ ADVANCED ANALOG TECHNOLOGY, INC. ]
