Advanced Analog Circuits
Data Sheet
AZ3842/3/4/5
M Package
(SOIC-14)
COMP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
REF
N/C
V
CC
PWR V
C
OUTPUT
GND
PWR GND
CURRENT MODE PWM CONTROLLER
Pin Configuration
P/M Package
(DIP-8/SOIC-8)
COMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
V
REF
V
CC
OUTPUT
GND
N/C
V
FB
N/C
I
SENSE
N/C
R
T
/C
T
Figure 2. Pin Configuration of AZ3842/3/4/5 (Top View)
Pin Description
Pin Number
8-pin
1
2
3
4
14-pin
1
3
5
7
Pin Name
COMP
V
FB
I
SENSE
R
T
/C
T
Function
This pin is the Error Amplifier output and is made available for loop compensation.
The inverting input of the Error Amplifier. It is normally connected to the switching
power supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses
this information to terminate the output switch conduction.
The Oscillator frequency and maximum Output duty cycle are programmed by con-
necting resistor R
T
to V
REF
and capacitor C
T
to ground. Operation to 500 kHz is pos-
sible.
The combined control circuitry and power ground.
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A
are sourced and sunk by this pin.
The positive supply of the control IC.
This is the reference output. It provides charging current for capacitor C
T
through
resistor R
T
.
This pin is a separate power ground return that is connected back to the power source.
It is used to reduce the effects of switching transient noise on the control circuitry.
The Output high state (V
OH
) is set by the voltage applied to this pin. With a separate
power source connection, it can reduce the effects of switching transient noise on the
control circuitry.
This pin is the control circuitry ground return and is connected back to the power
source ground.
No connection. These pins are not internally connected.
5
6
7
8
10
12
14
8
11
GND
OUTPUT
V
CC
V
REF
PWR GND
PWR V
C
9
2,4,6,13
GND
N/C
March 2003
2
Rev: 1.0
AAT [ ADVANCED ANALOG TECHNOLOGY, INC. ]
