Frequency Divider Evaluation Board
ABLNO- EVAL
TRUTH TABLE
S
COMPONENT DESCRIPTION
S1
S2
S3
DN
DN
DN
DN
UP
DN
DN
UP
UP
DN
UP
UP
S1
UP
UP
UP
UP
S2
DN
UP
UP
UP
S3
DN
DN
UP
UP
Pb
RoHS Compliant
60.4 x 42.7 x 13.0 mm
| | | | | | | | | | | | | | |
S4
DN
DN
DN
UP
S4
DN
DN
DN
UP
Table # 1
Description
ABLNO’s RF Output = ÷1
ABLNO’s RF Output = ÷2
ABLNO’s RF Output = ÷4
ABLNO’s RF Output = ÷8
Table # 2
Description
RF_IN Port’s RF Output = ÷1
RF_IN Port’s RF Output = ÷2
RF_IN Port’s RF Output = ÷4
RF_IN Port’s RF Output = ÷8
Note # 1: DN
= Down Position;
UP
= Up Position
Note # 2:
All four switches are shipped with yellow protective tape on top, please remove before use
Note # 3:
To evaluate Abracon’s ABLNO Crystal Oscillator, please solder it down in the section outlined
with a rectangle and labeled ABLNO. Please follow the orientation shown in figure (3) below.
Figure (3)
Note # 4:
VDD Port biases both the ABLNO device, as well as the divider circuitry. Since ABLNO’s
VDD range is +3.3V ±5%, the recommended VDD range while evaluating ABLNO oscillators is
+3.135V to +3.465V. However, since the divider circuitry can be biased between +1.8V &
+5.5V, while evaluating RF_IN external signal; lower or higher biasing voltage can be used, as
long as the peak-to-peak signal from the RF_IN port does not exceed the bias voltage (VDD).
Note # 5:
RF_IN port expects a LVCMOS signal. If a clipped Sinewave or Sinewave signal with lower
amplitude is used; it might be necessary to square-that-up. There is a provision above
(S1)
to
add a buffer to achieve this. Please contact
tech-support@abracon.com
.
ABRACON IS
ISO9001:2008
CE RTIFIED
CERTIFIED
Revised: 06.06.13
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000
|
fax 949-546-8001
| www.abracon.com
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www.abracon.com
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