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AK591024AS_09 参数 Datasheet PDF下载

AK591024AS_09图片预览
型号: AK591024AS_09
PDF下载: 下载PDF文件 查看货源
内容描述: 动态随机存取存储器 [Dynamic Random Access Memory]
分类和应用: 存储
文件页数/大小: 2 页 / 89 K
品牌: ACCUTEK [ ACCUTEK MICROCIRCUIT CORPORATION ]
 浏览型号AK591024AS_09的Datasheet PDF文件第2页  
MICROCIRCUIT CORPORATION
DESCRIPTION
The Accutek AK591024 high density memory modules is a random
access memory organized in 1 Meg x 9 bit words. The assembly
consists of two 1 Meg x 4 and one 1 Meg x 1 DRAMs in surface
mount packages mounted on the front side of a printed circuit board.
The module can be configured as a leadless 30 pad SIM or a leaded
30 pin SIP. This packaging approach provides a better than 6 to 1
density increase over standard DIP packaging.
The operation of the AK591024 is identical to two 1 Meg x 4 plus one
1 Meg x 1 DRAMs. For the lower eight bits, the data input is tied to
data output and brought out separately for each 1 Meg x 4 device,
with common RAS, CAS and WE control. The OE pins are tied to
Vss which dictates the use of early-write cycles to prevent conten-
tion of D and Q. Since the Write-Enable (WE) signal must always go
low before CAS in a write cycle, Read-Write and Read-Modify-Write
operation is not possible. For the ninth bit, the data input (D
9)
and
data output (Q
9
) pins are brought out separately and controlled by a
separate PCAS for that bit. Bit nine is generally used for parity.
ACCUTEK
AK591024AS / AK591024AG
1,048,576 Word X 9 bit, CMOS
Dynamic Random Access Memory
Front View
30-Pin SIM
+
1
+
30
30-Pin SIP
+
1
+
FEATURES
·
1,048,576 x 9 bit organization
·
Optional 30 Pad SIM (Single In-Line Module) or 30 Pin leaded
SIP (Single In-Line Package)
·
JEDEC standard pinout
·
Common CAS, RAS and WE control for the lower eight bits
·
1024 refresh cycles/16ms
·
Separate PCAS control for D
9
and Q
9
·
Power:
1.650 Watt Max Active (60 nS)
1.485 Watt Max Active (70 nS)
1.265 Watt Max Active (80 nS)
23.5 mWatt Standby (max)
·
Operating free air temperature: 0
o
to 70
o
C
·
Upward compatible with and AK594096 and AK5916384
·
Downward compaitble with AK59256
·
Functionally and Pin compatible with AK491024
PIN NOMENCLATURE
DQ
1
- DQ
8
D
9
Q
9
A
0
- A
9
CAS, PCAS
RAS
WE
Vcc
Vss
NC
Data In / Data Out
Data In
Data Out
Address Inputs
Column Address Strobe
Row Address Strobe
Write Enable
5v Supply
Ground
No Connect
PIN ASSIGNMENT
PIN #
SYMBOL
PIN #
SYMBOL
FUNCTIONAL DIAGRAM
DQ5
A8
A9
NC
DQ6
WE
Vss
DQ7
NC
DQ8
Q9
RAS
PCAS
D9
Vcc
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Vcc
CAS
DQ1
A0
A1
DQ2
A2
A3
Vss
DQ3
A4
A5
DQ4
A6
A7
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
0
- A
9
+
RAS +
CAS +
WE +
DQ1 +
DQ2 +
DQ3 +
DQ4 +
10
A
0
- A
9
* RAS
* CAS
* WE
* DQ1
* DQ2
* DQ3
* DQ4
OE
*
DQ5
DQ6
DQ7
DQ8
+
+
+
+
A
0
- A
9
* RAS
* CAS
* WE
* DQ1
* DQ2
* DQ3
* DQ4
OE
*
MODULE OPTIONS
Leadless SIM: AK591024ASP
Leaded SIP: AK591024AGP
15
PCAS +
A
0
- A
9
* RAS
* CAS
* WE
D9 +
Q9 +
*D
Q *