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AK594096BS_09 参数 Datasheet PDF下载

AK594096BS_09图片预览
型号: AK594096BS_09
PDF下载: 下载PDF文件 查看货源
内容描述: 动态随机存取存储器 [Dynamic Random Access Memory]
分类和应用: 存储
文件页数/大小: 2 页 / 76 K
品牌: ACCUTEK [ ACCUTEK MICROCIRCUIT CORPORATION ]
 浏览型号AK594096BS_09的Datasheet PDF文件第2页  
MICROCIRCUIT CORPORATION
DESCRIPTION
The Accutek AK594096 high density memory module is a CMOS
random access memory organized in 4 Meg x 9 bit words. The as-
sembly consists of two 4 Meg x 4 and one 4 Meg x 1 DRAMs,
mounted on the front side of a printed circuit board in 30 pad SIM
(leadless) or 30 pin SIP (leaded) configuration with
JEDEC-standard pinouts. Designed especially for low-height appli-
cations such as VMEbus boards, this low profile module is 0.550
inch high.
The operation is identical to nine 4 Meg x 1 DRAMs. For the lower
eight bits, data input is tied to data output and brought out separately
for each bit, with common RAS and CAS control. This common I/O
feature dictates the use of early-write cycles to prevent contention of
data In and data out. Since the Write-Enable (WE)i signal must al-
ways go low before CAS in a write cycle, Read-Write and
Read-Modify-Write operation is not possible. For the ninth bit, data
in (D
9
) and data out (Q
9
) pins are brought our separately and con-
trolled by a separate PCAS for that bit.
+
ACCUTEK
AK594096BS / AK594096BG
4,194,304 Word by 9 Bit CMOS
Dynamic Random Access Memory
Front View
30-Pin SIM
+
1
30
30-Pin SIP
+
+
1
·
Refresh cycle 2048 cycles in 32 mSEC
·
Power
1.450 Watt Max Active, 70 nSEC
1.610 Watt Max Active, 60 nSEC
16.5 mWatt Max Standy
·
Operating free air temperature 0
0
C to 70
0
C
·
Downward compatible with AK591024 and AK59256
·
Upward compatible with AK5916384
·
Fast Page Mode and Static Column Mode versions available,
nibble mode is not possible
FEATURES
·
4,194,304 x 9 bit organization
·
Low Profile 30 pad (SIM) Single In-Line Memory
·
Low Profile 30 pin (SIP) Single In-Line package
·
JEDEC standard pinout
·
Common CAS, RAS and WE for the lower eight bits
·
CAS-before-RAS refresh
PIN NOMENCLATURE
A
0
- A
10
RAS
0
CAS
WE
OE
DQ
1
- DQ
8
D
9
Q
9
Vcc
Vss
NC
Address Inputs
Row Address Strobe
Column Address Strobe
Write Enable
Output Enable
Data In/Data Out
Data In
Data Out
5v Supply
Ground
No Connect
PIN ASSIGNMENT
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FUNCTIONAL DIAGRAM
Symbol
DQ5
A8
A9
A10
DQ6
WE
Vss
DQ7
NC
DQ8
NC
RAS
0
NC
NC
Vcc
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
Vcc
CAS
DQ1
A0
A1
DQ2
A2
A3
Vss
DQ3
A4
A5
DQ4
A6
A7
Pin #
A
0
- A
10
+
RAS +
CAS +
WE +
DQ1 +
DQ2 +
DQ3 +
DQ4 +
11
A
0
- A
10
* RAS
* CAS
* WE
* DQ1
* DQ2
* DQ3
* DQ4
OE
*
DQ5
DQ6
DQ7
DQ8
+
+
+
+
*
*
*
*
*
*
*
A
0
- A
9
RAS
CAS
WE
DQ1
DQ2
DQ3
DQ4
OE
*
MODULE OPTIONS
Leadless SIM: AK594096BS
Leaded SIP: AK594096BG
PCAS +
A
0
- A
11
* RAS
* CAS
* WE
D9 +
Q9 +
*D
Q *