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AK68512D_10 参数 Datasheet PDF下载

AK68512D_10图片预览
型号: AK68512D_10
PDF下载: 下载PDF文件 查看货源
内容描述: 静态随机存取存储器 [Static Random Access Memory]
分类和应用: 存储
文件页数/大小: 2 页 / 75 K
品牌: ACCUTEK [ ACCUTEK MICROCIRCUIT CORPORATION ]
 浏览型号AK68512D_10的Datasheet PDF文件第2页  
MICROCIRCUIT CORPORATION
DESCRIPTION
The Accutek AK68512D high density memory module is a static
random access memory organized in 512K x 8 bit words. The as-
sembly consists of two medium speed 128K x 8 SRAMs in thin
TSOP packages and a CMOS decoder logic IC mounted on the top
side and two medium speed 128K x 8 SRAMs in thin TSOP pack-
ages mounted on the bottom surfaces of a printed circuit board.
The module is supplied in a 600 mil wide,32 pin DIP (Dual In-Line
Package) configuration. This pinout is completely compatible with
forthcoming industry standard monolithic designs. These modules
are intended for use in applications where limited board space dic-
tates compact module designs.
The operation of the AK68512D is identical to standard monolithic 8
bit word wide SRAMs.
The AK68512D offers the features of low power and medium speed
by using CMOS devices and makes high density mounting possible
with no surface mount technology.
p
To
w
Vie
ACCUTEK
AK68512D
524,288 x 8 Bit CMOS
Static Random Access Memory
1
Bo
m
tto
w
Vie
1
·
Operating free air temperature 0
0
to 70
0
C
FEATURES
·
524,288 x 8 bit organization
·
Fast access time: 85 - 120 nSEC
·
Completely static RAM, no clock or timing strobe required
·
Inputs and outputs TTL compatible
·
Conventional 600 mil wide SIP package with industry
compatible pinout
·
Single 5 volt power supply - AK68512D
·
Single 3.3 volt power supply - AK68512D/3.3
ELECTRICAL SPECIFICATIONS
Timing diagrams and basic electrical characteristics are those of
the standard 128K x 8 SRAMs used to construct these modules.
Accutek’s module design allows the flexibility of selecting indus-
try-compatible 128K x 8 SRAMs from any of a number of semicon-
ductor manufacturers.
PIN NOMENCLATURE
DQ
1
- DQ
8
A
0
- A
18
CE
WE
Vcc
Vss
OE
Data In/Data Out
PIN ASSIGNMENT
1
Adress Inputs
Chip Enable
Write Enable
5v Supply
Ground
Output Enable
TIMING OPTIONS
70 nSEC Access Time
85 nSEC Access Time
100 nSEC Access Time
120 nSEC Access Time
A
18
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DQ
1
DQ
2
DQ
3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
A
15
A
17
WE
A
13
A
8
A
9
A
11
OE
A
10
CE
DQ
8
DQ
7
DQ
6
DQ
5
DQ
4
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