ACE2301
Technology
Description
The ACE2301 is the P-Channel logic enhancement mode power field effect transistor are produced
using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone and notebook
computer power management and Battery powered circuits, and low in-line power loss are needed in a
very small outline surface mount package.
P-Channel Enhancement Mode MOSFET
Features
•
•
•
•
•
V
DS
=-20V
R
DS(ON)
,V
gs
@-4.5V,I
ds
@-2.8A=100mΩ
R
DS(ON)
,V
gs
@-2.5V,I
ds
@-2.0A=150mΩ
Advanced trench process technology
High Density Cell Design For Ultra Low On-Resistance
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
1)
Maximum Power Dissipation
T
A
=25℃
T
A
=70℃
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
J
T
STG
R
θ
JA
Max
Unit
-20
V
±12
V
-2.2
A
-8
A
1.25
W
0.8
-55 to 150
O
C
-55 to 150
O
C
O
140
C/W
Operating Junction Temperature
Storage Temperature Range
Junction to Ambient Thermal Resistance (PCB mounted)
2)
2
2.1-in 2oz Cu PCB board.
Note: 1.Repetitive Rating: Pulse width limited by the maximum junction temperature.
3.Guaranteed by design; not subject to production testing.
VER 1.2
1