ACE3413
Technology
Description
The ACE3413 is the P-Channel logic enhancement mode power field effect transistors are produced
using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage application such as cellular phone and notebook
computer power management and Battery powered circuits, and low in-line power loss are needed in a
very small outline surface mount package.
P-Channel Enhancement Mode MOSFET
Features
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-20V/-3.4A, R
DS(ON)
=95mΩ@V
GS
=-4.5V
-20V/-2.4A, R
DS(ON)
=120mΩ@V
GS
=-2.5V
-20V/-1.7A, R
DS(ON)
=145mΩ@V
GS
=-1.8V
-20V/-1.0A, R
DS(ON)
=210mΩ@V
GS
=-1.25V
Super high density cell design for extremely low R
DS(ON)
Exceptional on-resistance and maximum DC current capability
SOT-23-3L package design
Application
Power Management in Note book
Portable Equipment
Battery Powered System
Load Switch
DSC
LCD Display inverter
Absolute Maximum Ratings
(TA=25℃ Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (T
J
=150℃)
Pulsed Drain Current
Continuous Source Current (Diode Conduction)
Power Dissipation
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol Typical Unit
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
R
θ
JA
-20
±12
-3.5
-2.8
-15
-1.4
1.25
0.8
V
V
A
A
A
W
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
-55/150
℃
-55/150
℃
150
℃/W
VER 1.2
1