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A1020B-1PG84M 参数 Datasheet PDF下载

A1020B-1PG84M图片预览
型号: A1020B-1PG84M
PDF下载: 下载PDF文件 查看货源
内容描述: ACT 1系列FPGA [ACT 1 Series FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 24 页 / 163 K
品牌: ACTEL [ Actel Corporation ]
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The systems are available for 386/486/Pentium
PC and for
HP
and Sun
workstations and for running Viewlogic
®
,
Mentor Graphics
®
, Cadence
, OrCAD
, and Synopsys
design environments.
Figure 1 •
Partial View of an ACT 1 Device
AC T 1 De vice S truct ure
A partial view of an ACT 1 device (Figure 1) depicts four logic
modules and distributed horizontal and vertical interconnect
tracks. PLICE antifuses, located at intersections of the
horizontal and vertical tracks, connect logic module inputs
and outputs. During programming, these antifuses are
addressed and programmed to make the connections
required by the circuit application.
T he ACT 1 Logi c Modul e
The ACT 1 logic module is an 8-input, one-output logic circuit
chosen for the wide range of functions it implements and for
its efficient use of interconnect routing resources (Figure 2).
The logic module can implement the four basic logic
functions (NAND, AND, OR, and NOR) in gates of two, three,
or four inputs. Each function may have many versions, with
different combinations of active-low inputs. The logic module
can also implement a variety of D-latches, exclusivity
functions, AND-ORs, and OR-ANDs. No dedicated hardwired
latches or flip-flops are required in the array, since latches
and flip-flops may be constructed from logic modules
wherever needed in the application.
Figure 2 •
ACT 1 Logic Module
I /O Bu ffe rs
Each I/O pin is available as an input, output, three-state, or
bidirectional buffer. Input and output levels are compatible
with standard TTL and CMOS specifications. Outputs sink or
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