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A40MX02-1PQ100 参数 Datasheet PDF下载

A40MX02-1PQ100图片预览
型号: A40MX02-1PQ100
PDF下载: 下载PDF文件 查看货源
内容描述: 40MX和42MX FPGA系列 [40MX and 42MX FPGA Families]
分类和应用:
文件页数/大小: 123 页 / 864 K
品牌: ACTEL [ Actel Corporation ]
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v6.0
40MX and 42MX FPGA Families
Features
High Capacity
Single-Chip ASIC Alternative
3,000 to 54,000 System Gates
Up to 2.5 kbits Configurable Dual-Port SRAM
Fast Wide-Decode Circuitry
Up to 202 User-Programmable I/O Pins
HiRel Features
Commercial, Industrial, Automotive, and Military
Temperature Plastic Packages
Commercial, Military Temperature, and MIL-STD-883
Ceramic Packages
QML Certification
Ceramic Devices Available to DSCC SMD
Ease of Integration
Mixed-Voltage Operation (5.0V or 3.3V for core and
I/Os), with PCI-Compliant I/Os
Up to 100% Resource Utilization and 100% Pin
Locking
Deterministic, User-Controllable Timing
Unique In-System Diagnostic and Verification
Capability with Silicon Explorer II
Low Power Consumption
IEEE Standard 1149.1 (JTAG) Boundary Scan Testing
High Performance
5.6 ns Clock-to-Out
250 MHz Performance
5 ns Dual-Port SRAM Access
100 MHz FIFOs
7.5 ns 35-Bit Address Decode
Product Profile
Device
Capacity
System Gates
SRAM Bits
Logic Modules
Sequential
Combinatorial
Decode
Clock-to-Out
SRAM Modules
(64x4 or 32x8)
Dedicated Flip-Flops
Maximum Flip-Flops
Clocks
User I/O (maximum)
PCI
Boundary Scan Test (BST)
Packages (by pin count)
PLCC
PQFP
VQFP
TQFP
CQFP
PBGA
A40MX02
3,000
295
9.5 ns
147
1
57
44, 68
100
80
A40MX04
6,000
547
9.5 ns
273
1
69
44, 68, 84
100
80
A42MX09
14,000
348
336
5.6 ns
348
516
2
104
84
100, 160
100
176
A42MX16
24,000
624
608
6.1 ns
624
928
2
140
84
100, 160, 208
100
176
A42MX24
36,000
954
912
24
6.1 ns
954
1,410
2
176
Yes
Yes
84
160, 208
176
A42MX36
54,000
2,560
1,230
1,184
24
6.3 ns
10
1,230
1,822
6
202
Yes
Yes
208, 240
208, 256
272
January 2004
© 2004 Actel Corporation
i
See the Actel website (www.actel.com) for the latest version of this datasheet.