SX-A Family FPGAs
PCI Compliance for the SX-A Family
The SX-A family supports 3.3 V and 5 V PCI and is compliant with the PCI Local Bus Specification Rev. 2.1.
Table 2-7 •
DC Specifications (5 V PCI Operation)
Symbol
V
CCA
V
CCI
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
C
IN
C
CLK
Notes:
1. Input leakage currents include hi-Z output leakage for all bidirectional buffers with tristate outputs.
2. Signals without pull-up resistors must have 3 mA low output current. Signals requiring pull-up must have 6 mA; the latter includes
FRAME#, IRDY#, TRDY#, DEVSEL#, STOP#, SERR#, PERR#, LOCK#, and, when used AD[63::32], C/BE[7::4]#, PAR64, REQ64#, and
ACK64#.
3. Absolute maximum pin capacitance for a PCI input is 10 pF (except for CLK).
Parameter
Supply Voltage for Array
Supply Voltage for I/Os
Input High Voltage
Input Low Voltage
Input High Leakage Current
1
Input Low Leakage Current
1
Output High Voltage
Output Low Voltage
2
Input Pin Capacitance
3
CLK Pin Capacitance
V
IN
= 2.7
V
IN
= 0.5
I
OUT
= –2 mA
I
OUT
= 3 mA, 6 mA
Condition
Min.
2.25
4.75
2.0
–0.5
–
–
2.4
–
–
5
Max.
2.75
5.25
5.75
0.8
70
–70
–
0.55
10
12
Units
V
V
V
V
µA
µA
V
V
pF
pF
v5.3
2-3
ACTEL [ Actel Corporation ]
