1
I/Os Per Package
ProASIC3
Devices
A3P015
A3P030
A3P060
A3P125
A3P250 3
A3P400 3
A3P600
A3P1000
ARM7 Devices
M7A3P1000
Cortex-M1
Devices
M1A3P250 3,6
I/O Type
M1A3P400 3
M1A3P600
M1A3P1000
Package
QN68
49
–
–
81
77
–
–
80
71
91
–
–
84
71
100
133
97
–
–
87
68
–
–
–
–
–
–
–
–
–
–
–
–
–
QN132
VQ100
TQ144
PQ208
FG144
FG256
FG484
Notes:
19
13
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
151
97
157
–
34
24
38
–
151
97
178
194
34
25
38
38
154
97
35
25
43
60
154
97
177
300
35
25
44
74
–
–
96
–
–
–
177
235
–
–
–
–
1. When considering migrating your design to a lower- or higher-density device, refer to the ProASIC3 Flash Family FPGAs
handbook to ensure complying with design and board migration requirements.
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For A3P250 and A3P400 devices, the maximum number of LVPECL pairs in east and west banks cannot exceed 15. Refer
to the ProASIC3 Flash Family FPGAs handbook for position assignments of the 15 LVPECL pairs.
4. FG256 and FG484 are footprint-compatible packages.
5. "G" indicates RoHS-compliant packages. Refer to "ProASIC3 Ordering Information" on page III for the location of the
"G" in the part number.
6. The M1A3P250 device does not support FG256 or QN132 packages.
Table 1-1 • ProASIC3 FPGAs Package Sizes Dimensions
Package
QN68
QN132
VQ100
TQ144
PQ208
FG144
FG256
FG484
Length × Width
(mm\mm)
8 × 8
8 × 8
14 × 14
20 × 20
28 × 28
13 × 13
17 × 17
23 × 23
Nominal Area
(mm2)
64
64
196
400
784
169
289
529
Pitch (mm)
0.4
0.5
0.5
0.5
0.5
1.0
1.0
1.0
Height (mm)
0.90
0.75
1.00
1.40
3.40
1.45
1.60
2.23
II
v1.0
ACTEL [ Actel Corporation ]
