Active-Semi
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
EP
ACT8325
Rev 2, 25-May-11
NAME
VP1
SW1
GP12
SW2
VP2
FB2
GA
ON1
ON2
FB1
EP
DESCRIPTION
Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed as close as
possible to the IC.
Switching Node Output for REG1. Connect this pin to the switching end of the inductor.
Power Ground for REG1, REG2. Connect GA and GP12 together at single point as close to the
IC as possible.
Switching Node Output for REG2. Connect this pin to the switching end of the inductor.
Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed as close as
possible to the IC.
Feedback Node for REG2. For fixed output voltage options, connect this pin directly to the out-
put. For the adjustable output voltage options the voltage at this pin is regulated to 0.625V, con-
nect this pin to the center of the output feedback resistor divider for voltage setting.
Analog Ground. Connect GA directly to a quiet ground node. Connect GA and GP12 together at
a single point as close to the IC as possible.
Enable Control Input for REG1. Drive ON1 to VP1 or to a logic high for normal operation, drive to
GA or to a logic low to disable REG1.
Enable Control Input for REG2. Drive ON2 to VP1or to a logic high for normal operation, drive to
GA or to a logic low to disable REG2.
Feedback Node for REG1. For fixed output voltage options, connect this pin directly to the out-
put. For the adjustable output voltage options the voltage at this pin is regulated to 0.625V, con-
nect this pin to the center of the output feedback resistor divider for voltage setting.
Exposed Pad. Must be soldered to ground on PCB.
Innovative Power
TM
ActivePMU
TM
-4-
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is a trademark of Active-Semi.