ACT8600
Rev 3, 15-Nov-12
PIN DESCRIPTIONS CONT’D
PIN
21
22
NAME
SW4
OUT4
NC
OUT2
VP2
SW2
GP12
SW1
VP1
OUT1
PWREN
nIRQ
OUT10
OUT9
5VIN
VBUS
Switch Node for REG4.
REG4 Output.
No Connect.
Output Voltage Sense for REG2.
Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed to the IC as
close as possible.
Switch Node for REG2.
Power Ground for REG1 and REG2. Connect GA, GP12 and GP3 together at a single point as
close to the IC as possible.
Switch Node for REG1.
Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed to the IC as
close as possible.
Output Voltage Sense for REG1.
Master enable pin.
Open-Drain Interrupt Output.
REG10 Output. Bypass it to GA with a 0.47μF capacitor.
REG9 Output. Bypass it to GA with a 1μF capacitor.
5V Input pin for OTG switch (optionally from OUT4 or external 5V source).
USB VBUS.
DESCRIPTION
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
CHGIN
Power Input for the Battery Charger. Bypass CHGIN to GA with a capacitor placed as close to
the IC as possible. The battery charger is automatically enabled when a valid voltage is present
on CHGIN .
38, 39
EP
VSYS
EP
System Output Pins. Bypass to GA with a 10μF or larger ceramic capacitor.
Exposed Pad. Must be soldered to ground on PCB.
Innovative Power
TM
ActivePMU
TM
and
ActivePath
TM
are trademarks of Active-Semi.
I
2
C
TM
is a trademark of NXP.
-7-
www.active-semi.com
Copyright © 2012 Active-Semi, Inc.
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
