UG-317
TERMINATION AND PULL-UP/PULL-DOWN
RESISTORS
The evaluation board includes the RT and RT1 footprints for
fitting termination resistors between the A and B receiver inputs
and the Y and Z driver outputs. By default, the board is fitted
with a 120 Ω resistor, RT, between A and B. This resistor should
be removed if the board is connected to a bus that is already
terminated at both ends. For more information about proper
termination, see the
RS-485/RS-422
Circuit Implementation Guide.
Although the
have a built-in receiver
fail-safe for the bus idle condition, there are footprints on the
evaluation board for fitting the R3 and R1 pull-up resistors to
VISO on A and Y, as well as the R4 and R2 pull-down resistors
to GND on B and Z. These resistors can be fitted if the user is
connecting to other parts that require such external biasing resis-
tors on the bus. The exact value required for a 200 mV minimum
differential voltage in the bus idle condition depends on the supply
voltage (for example, 960 Ω for 3.3 V and 1440 Ω for 5 V).
For more information about the bus idle fail-safe, see the
RS-485/RS-422 Circuit Implementation Guide.
Evaluation Board User Guide
DECOUPLING AND RESERVOIR CAPACITORS
The evaluation board uses the following decoupling and
reservoir capacitors:
•
On the logic side of the board, the C1 and C2 capacitors
should be 10 μF and 100 nF ceramic capacitors, respectively,
and the C4 and C6 capacitors should be 10 nF and 100 nF
ceramic capacitors, respectively.
On the bus side of the board, the C5 and C7 capacitors
should be 10 nF and 100 nF, respectively, and the C8 and
C9 capacitors should be 100 nF and 10 μF, respectively.
•
BOARD INTERNAL LAYER THICKNESS
The
evaluation board consists of
six layers with four internal layers. The spacing between the
maximize the stitching capacitance on the board.
Table 2. Spacing Between Layers of the Evaluation Board
Layers
1 to 2
2 to 3
3 to 4
4 to 5
5 to 6
Thickness of Space Between Layers (mm)
0.1016
0.2032
0.2032
0.2032
0.1016
Rev. 0 | Page 4 of 12
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