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AD603AQ 参数 Datasheet PDF下载

AD603AQ图片预览
型号: AD603AQ
PDF下载: 下载PDF文件 查看货源
内容描述: 低噪声, 90 MHz可变增益放大器 [Low Noise, 90 MHz Variable-Gain Amplifier]
分类和应用: 放大器
文件页数/大小: 14 页 / 222 K
品牌: ADI [ ADI ]
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AD603  
THEORY OF THE AD603  
A Low Noise AGC Amplifier  
3.0  
2.5  
2.0  
Figure 15 shows the ease with which the AD603 can be connected  
as an AGC amplifier. The circuit illustrates many of the points  
previously discussed: It uses few parts, has linear-in-dB gain,  
operates from a single supply, uses two cascaded amplifiers in  
sequential gain mode for maximum S/N ratio, and an external  
resistor programs each amplifier’s gain. It also uses a simple  
temperature-compensated detector.  
1.5  
1.0  
0.5  
0.0  
–0.5  
–1.0  
–1.5  
–2.0  
–2.5  
The circuit operates from a single 10 V supply. Resistors R1,  
R2, R3, and R4 bias the common pins of A1 and A2 at 5 V.  
This pin is a low impedance point and must have a low impedance  
path to ground, here provided by the 100 µF tantalum capacitors  
and the 0.1 µF ceramic capacitors.  
–3.0  
–0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1  
V
C
The cascaded amplifiers operate in sequential gain. Here, the  
offset voltage between the pins 2 (GNEG) of A1 and A2 is  
1.05 V (42.14 dB × 25 mV/dB), provided by a voltage divider  
consisting of resistors R5, R6, and R7. Using standard values,  
the offset is not exact, but it is not critical for this application.  
Figure 13. Gain Error for Cascaded Stages–Low Ripple  
Mode  
90  
85  
The gain of both A1 and A2 is programmed by resistors R13  
and R14, respectively, to be about 42 dB; thus the maximum  
gain of the circuit is twice that, or 84 dB. The gain-control  
range can be shifted up by as much as 20 dB by appropriate  
choices of R13 and R14.  
80  
75  
70  
65  
60  
55  
50  
The circuit operates as follows. A1 and A2 are cascaded.  
Capacitor C1 and the 100 of resistance at the input of A1  
form a time-constant of 10 µs. C2 blocks the small dc offset  
voltage at the output of A1 (which might otherwise saturate A2  
at its maximum gain) and introduces a high-pass corner at about  
16 kHz, eliminating low frequency noise.  
A half-wave detector is used, based on Q1 and R8. The current  
into capacitor CAV is just the difference between the collector  
current of Q2 (biased to be 300 µA at 300 K, 27°C) and the col-  
lector current of Q1, which increases with the amplitude of the  
0
–0.2  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V
C
Figure 14. ISNR vs. Control Voltage–Low Ripple Mode  
10V  
C11  
0.1F  
R9  
1.54k⍀  
R10  
1.24k⍀  
THIS CAPACITOR SETS  
AGC TIME CONSTANT  
Q2  
2N3906  
V
AGC  
C7  
0.1F  
R11  
3.83k⍀  
10V  
C8  
0.1F  
10V  
C
0.1F  
AV  
5V  
R13  
2.49k⍀  
Q1  
2N3904  
C1  
0.1F  
C9  
0.1F  
R12  
4.99k⍀  
R14  
2.49k⍀  
C2  
0.1F  
J1  
R8  
806⍀  
A1  
AD603  
RT  
100⍀  
10V  
R1  
1
A2  
AD603  
10V  
R3  
J2  
C10  
0.1F  
2.49k⍀  
2.49k⍀  
+
R2  
2.49k⍀  
C3  
100F  
C4  
0.1F  
2
+
R4  
2.49k⍀  
C5  
100F  
C6  
0.1F  
2
AGC LINE  
1V OFFSET FOR  
SEQUENTIAL GAIN  
R5  
5.49k⍀  
R7  
3.48k⍀  
10V  
5.5V  
6.5V  
R6  
1.05k⍀  
NOTES  
1
R
PROVIDES A 50INPUT IMPEDANCE  
T
2
C3 AND C5 ARE TANTALUM  
Figure 15. A Low Noise AGC Amplifier  
–9–  
REV. C