AD622
GAIN SELECTION
The AD622 gain is resistor programmed by R
G
or, more
precisely, by whatever impedance appears between Pin 1 and
Pin 8. The AD622 is designed to offer gains as close as possible
to popular integer values using standard 1% resistors. Table 5
shows required values of R
G
for various gains. Note that for
G = 1, the R
G
pins are unconnected (R
G
= ∞). For any arbitrary
gain, R
G
can be calculated by using the formula
separately. For longer time periods, the input current should not
exceed 6 mA. For input overloads beyond the supplies, clamping
the inputs to the supplies (using a diode such as a BAV199)
reduces the required resistance, yielding lower noise.
Large Input Voltages at Large Gains
When operating at high gain, large differential input voltages
may cause more than 6 mA of current to flow into the inputs.
This condition occurs when the maximum differential voltage
exceeds the following critical voltage:
V
CRITICAL
= (400 +
R
G
) × (6 mA)
This is true for differential voltages of either polarity.
The maximum allowed differential voltage can be increased by
adding an input protection resistor in series with each input.
The value of each protection resistor should be as follows:
R
PROTECT
= (V
DIFF_MAX
−
V
CRITICAL
)/6 mA
R
G
=
50.5 k
Ω
G
−
1
To minimize gain error, avoid high parasitic resistance in series
with R
G
. To minimize gain drift, R
G
should have a low temperature
coefficient less than 10 ppm/°C for the best performance.
Table 5. Required Values of Gain Resistors
Desired
Gain
2
5
10
20
33
40
50
65
100
200
500
1000
1% Std Table Value of R
G
, Ω
51.1 k
12.7 k
5.62 k
2.67 k
1.58 k
1.3 k
1.02 k
787
511
255
102
51.1
Calculated
Gain
1.988
4.976
9.986
19.91
32.96
39.85
50.50
65.17
99.83
199.0
496.1
989.3
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
may appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass, RC network placed at the input
of the instrumentation amplifier, as shown in Figure 18. In
addition, this RC input network also provides additional input
overload protection (see the Input Protection section).
+V
S
0.1µF
R
4.02kΩ
R
4.02kΩ
C
C
1nF
C
D
47nF
C
C
1nF
10µF
+
INPUT AND OUTPUT OFFSET VOLTAGE
The low errors of the AD622 are attributable to two sources:
input and output errors. The output error is divided by G when
referred to the input. In practice, the input errors dominate at
high gains and the output errors dominate at low gains. The
total V
OS
for a given gain is calculated as follows:
Total Error RTI
=
input error
+ (output
error/G)
Total Error RTO
= (input
error
×
G)
+
output error
+IN
R
G
–IN
AD622
V
OUT
REF
0.1µF
–V
S
10µF
Figure 18. RFI Suppression Circuit for AD622 Series In-Amps
REFERENCE TERMINAL
The reference terminal potential defines the zero output voltage
and is especially useful when the load does not share a precise
ground with the rest of the system. The reference terminal provides
a direct means of injecting a precise offset to the output, with an
allowable range of 2 V within the supply voltages. Parasitic
resistance should be kept to a minimum for optimum CMR.
The filter limits the input signal bandwidth to the following
cutoff frequencies:
FilterFreq
DIFF
=
FilterFreq
CM
=
where
C
D
≥ 10C
C
.
1
2
π
R
(2
C
D
+
C
C
)
1
2
π
RC
C
INPUT PROTECTION
The AD622 features 400 Ω of series thin film resistance at its
inputs and safely withstands input overloads of up to ±15 V or
±60 mA for up to an hour at room temperature. This is true for
all gains and power on and off, which is particularly important
because the signal source and amplifier can be powered
Rev. D | Page 11 of 16
00777-017
+
AD [ ANALOG DEVICES ]
