AD637
1 F
NOTE: VALUES CHOSEN TO GIVE 0.1%
AVERAGING ERROR @ 1Hz
BUFFER
1
ABSOLUTE
VALUE
3.3M
3.3M
1 F
14
SIGNAL
INPUT
–V
S
6.8M
+V
S
AD637
AD548JN
FILTERED
V rms OUTPUT
NC 2
+V
S
OUTPUT
OFFSET 50k
ADJUST
–V
S
1M
4
5
25k
6
7
3
BIAS
SECTION
13
12 NC
SQUARER/DIVIDER
25k
1000pF
11
10
9
+V
S
–V
S
V
IN2
V rms
+
100 F
FILTER
8
C
AV
499k
C
AV1
3.3 F
R
1%
Figure 15. AD637 as a Low Frequency RMS Converter
VECTOR SUMMATION
EXPANDABLE
Vector summation can be accomplished through the use of two
AD637s as shown in Figure 16. Here the averaging capacitors
are omitted (nominal 100 pF capacitors are used to insure
stability of the filter amplifier), and the outputs are summed as
shown. The output of the circuit is
V
O
=
V
X
+V
Y
2
2
BUFFER
1
AD637
14
ABSOLUTE
VALUE
13
12
V
X
IN
2
3
BIAS
SECTION
4
5
25k
6
7
This concept can be expanded to include additional terms by
feeding the signal from Pin 9 of each additional AD637 through
a 10 kΩ resistor to the summing junction of the AD711, and ty-
ing all of the denominator inputs (Pin 6) together.
If C
AV
is added to IC1 in this configuration, the output is
2
2
V
X
+V
Y
. If the averaging capacitor is included on both
SQUARER/DIVIDER
25k
11
10
+V
S
–V
S
9
100pF
FILTER
8
10k
BUFFER
5pF
10k
IC1 and IC2, the output will be
V
X
+V
Y
2
2
.
AD637
14
ABSOLUTE
VALUE
13
12
V
X
IN
1
This circuit has a dynamic range of 10 V to 10 mV and is lim-
ited only by the 0.5 mV offset voltage of the AD637. The useful
bandwidth is 100 kHz.
2
3
BIAS
SECTION
4
5
25k
6
7
AD711K
10k
+V
S
20k
–V
S
SQUARER/DIVIDER
25k
11
10
9
100pF
FILTER
8
V
OUT
=
V
X2
+ V
V2
Figure 16. AD637 Vector Sum Configuration
REV. E
–9–
AD [ ANALOG DEVICES ]
