AD7729
FUNCTIONAL DESCRIPTION
BASEBAND CODEC
Receive Section
4.7k
IRx
4.7k
100pF
100pF
IRxN
IRxP
I CHANNEL
AD7729
The receive section consists of I and Q receive channels, each
comprising of a simple switched-capacitor filter followed by a
15-bit sigma-delta ADC. On-board digital filters, which form
part of the sigma-delta ADCs, also perform critical system-level
filtering. Their amplitude and phase response characteristics
provide excellent adjacent channel rejection. The receive sec-
tion is also provided with a low power sleep mode to place the
receive section on standby between receive bursts, drawing only
minimal current.
Switched Capacitor Input
4.7k
QRx
4.7k
100pF
100pF
QRxP
Q CHANNEL
QRxN
The receive section analog front-end is sampled at 13 MHz by a
switched-capacitor filter. The filter has a zero at 6.5 MHz as
shown in Figure 8a. The receive channel also contains a digital
low-pass filter (further details are contained in the following
section) which operates at a clock frequency of 6.5 MHz. Due
to the sampling nature of the digital filter, the passband is re-
peated about the operating clock frequency and at multiples of
the clock frequency (Figure 8b). Because the first null of the
switched-capacitor filter coincides with the first image of the
digital filter, this image is attenuated by an additional 30 dBs
(Figure 8c), further simplifying the external antialiasing require-
ments (see Figures 9 and 10).
0 dBs
FRONT-END
ANALOG FILTER
TRANSFER
FUNCTION
6.5
13
19.5
REFOUT
TO INPUT BIAS
CIRCUITRY
0.1 F
0.1 F
REFCAP
VOLTAGE
REFERENCE
Figure 9. Example Circuit for Differential Input
Figure 10 shows the recommended single-ended analog input
circuit.
AD7729
MHz
IRx
4.7k
100pF
IRxP
I CHANNEL
IRxN
a) Switched-Cap Filter Frequency Response
0 dBs
QRx
DIGITAL FILTER
TRANSFER
FUNCTION
6.5
13
19.5
4.7k
100pF
QRxP
Q CHANNEL
MHz
QRxN
b) Digital Filter Frequency Response
V
BIAS
0 dBs
SYSTEM FILTER
TRANSFER
FUNCTION
6.5
13
19.5
HIGH SPEED
BUFFER
0.1 F
MHz
0.1 F
REFCAP
VOLTAGE
REFERENCE
REFOUT
c) Overall System Response of the Receive
Channel
Figure 8.
Figure 10. Example Circuit for Single-Ended Input
The circuitry of Figure 9 implements first-order low-pass filters
with a 3 dB point at 338 kHz; these are the only filters that
must be implemented external to the baseband section to pre-
vent aliasing of the sampled signal.
REV. 0
–9–
AD [ ANALOG DEVICES ]
