AD7801–SPECIFICATIONS
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
2
Differential Nonlinearity
Zero-Code Error @ +25°C
Full-Scale Error
Zero-Code Error Drift
Gain Error
3
DAC REFERENCE INPUT
REFIN Input Range
REFIN Input Impedance
OUTPUT CHARACTERISTICS
Output Voltage Range
Output Voltage Settling Time
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Feedthrough
DC Output Impedance
Short Circuit Current
Power Supply Rejection Ratio
4
LOGIC INPUTS
Input Current
V
INL
, Input Low Voltage
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
V
INH
, Input High Voltage
Pin Capacitance
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
V
DD
= 3.3 V
@ 25°C
T
MIN
to T
MAX
V
DD
= 5.5 V
@ 25°C
T
MIN
to T
MAX
I
DD
(Power-Down)
@ 25°C
T
MIN
to T
MAX
8
±
1
±
1
3
–0.75
100
±
1
(V
DD
= +2.7 V to +5.5 V, Internal Reference; C
L
= 100 pF, R
L
= 10 k
All specifications T
MIN
to T
MAX
unless otherwise noted.)
Units
Bits
LSB max
LSB max
LSB typ
LSB typ
µV/°C
typ
% FSR typ
V min/V max
MΩ typ
V min/V max
µs
max
V/µs typ
nV-s typ
nV-s typ
Ω
typ
mA typ
%/% max
µA
max
V max
V max
V min
V min
pF max
V min/V max
mA max
mA max
mA max
mA max
µA
max
µA
max
V
IH
= V
DD
and V
IL
= GND
See Figure 18
Conditions/Comments
to V
DD
and GND.
B Versions
1
Guaranteed Monotonic
All Zeros Loaded to DAC Register
All Ones Loaded to DAC Register
1 to V
DD
/2
10
0 to V
DD
2
7.5
1
0.2
40
14
0.0003
±
10
0.8
0.6
2.4
2.1
7
2.7/5.5
1.55
1.75
2.35
2.5
1
2
Typically 1.2
µs
1 LSB Change Around Major Carry
∆V
DD
=
±
10%
V
DD
= +5 V
V
DD
= +3 V
V
DD
= +5 V
V
DD
= +3 V
DAC Active and Excluding Load Current
V
IH
= V
DD
and V
IL
= GND
See Figure 6
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +105°C
2
Relative Accuracy is calculated using a reduced code range of 15 to 245.
3
Gain Error is specified between Codes 15 and 245. The actual error at Code 15 is typically 3 LSB.
4
Guaranteed by characterization at product release, not production tested.
Specifications subject to change without notice.
t
1
CS
t
2
t
3
WR
t
4
D7-D0
t
5
t
6
LDAC
t
7
t
8
CLR
Figure 1. Timing Diagram for Parallel Data Write
–2–
REV. 0
AD [ ANALOG DEVICES ]
