AD8303–Typical Performance Characteristics
120
7
BROADBAND NOISE – 200µV/DIV
POSITIVE
CURRENT
LIMIT
V
DD
= +5V
80
OUTPUT CURRENT – mA
100
90
SUPPLY CURRENT – mA
T
A
= +25°C
NBW = 635kHz
6
5
4
T
A
= +25°C
DATA = 000
H
40
DATA = 800
H
R
L
TIED TO
+1.024V
0
V
DD
= +5V
3
2
1
0
V
DD
= +3V
–40
NEGATIVE
CURRENT
LIMIT
0
1
OUTPUT VOLTAGE – Volts
2
10
0%
–80
–120
TIME = 100µs/DIV
0
1
2
3
4
LOGIC VOLTAGE – Volts
5
Figure 4. I
OUT
vs. V
OUT
Figure 5. Broadband Noise
Figure 6. Supply Current vs. Logic
Input Voltage
75
POWER SUPPLY REJECTION – dB
V
DD
= +5V
±
10%
60
100
100
90
50mV
1V
5µs
45
T
A
= +25°C
DATA = 800
H
90
V
OUT
V
OUT
30
V
DD
= +3V
±
10%
LD
10
10
0%
LD
15
0%
5V
0
10
CODE 800
H
TO 7FF
H
200ns
5V
100
1k
10k
100k
FREQUENCY – Hz
1M
Figure 7. Power Supply Rejection
vs. Frequency
Figure 8. Midscale Transition
Performance
Figure 9. Large Signal Settling Time
120
2.5
TUE =
∑
(INL+ZS+FS)
SS = 200 UNITS
V
DD
= +2.7V
V
OUT
DRIFT – mV
NO LOAD
SS = 200 UNITS
NORMALIZED TO +25°C
10mV
100
90
100
2.0
V
OUT
FREQUENCY
80
1.5
60
1.0
V
DD
= +5.5V
V
DD
= +2.7V
40
0.5
10
0%
CLK
20
0
2V
1µs
0
–5 –3 –1 1 3 5 7 9 11 13 15
TOTAL UNADJUSTED ERROR – LSB
–0.5
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE –
°C
Figure 10. Clock Feedthrough vs.
Time
Figure 11. Total Unadjusted
Error Histogram
Figure 12. Full-Scale Voltage Drift
vs. Temperature
–6–
REV. 0
AD [ ANALOG DEVICES ]
