AD9768–SPECIFICATIONS
Parameter
RESOLUTION(FS = FULL SCALE)
LSB WEIGHT (CURRENT)
ACCURACY
1
Differential Nonlinearity
Integral Nonlinearity
Monotonicity
Zero Offset (lnitial)
TEMPERATURE COEFFICIENTS
Zero Offset
Reference Voltage (–1.26 V)
DIGITAL DATA INPUTS
Logic Compatibility
Logic Voltage Levels “l” =
“0” =
Coding
OUTPUT
Current (Unipolar) FS
I
OUT
(@ Pin 13)
All Digital “1” Input
All Digital “0” Input
I
OUT
(@ Pin 14)
All Digital “l” Input
All Digital “0” Input
Compliance
Impedance
SPEED PERFORMANCE
Settling Time (to 0.2% FS)
2
Slew Rate
Update Rate
Rise Time
Glitch Energy
REFERENCE
Internal, Monolithic
3
External, Variable
4
Voltage-Multiplying Mode
Current-Multiplying Mode
Unit
Bits
µA
±
% FS
±
% FS
µA
ppm/°C
ppm/°C
8
78
(typical @ +25 C under following conditions unless otherwise noted; nominal digital
input levels; nominal power supplies; R
L
= 50 ; R
SET
= 220 ; V
RET
= 0 V)
Parameter
CURRENT-MULTIPLYING MODE
(See Figure 4)
I
M
Range (at Pins 17 & 18)
Resistance (at Pin 18)
Transfer Function –
Unit
AD9768SJD/SD/SE
AD9768SJD/SD/SE
0.2
0.2
Guaranteed
60
1.5
70
ECL
V
–0.9
V
–1.7
Binary (BIN) = Unipolar Out
Offset Binary (OBN) = Bipolar Out
mA (max)
mA
mA
mA
mA
V (Pin 13)
V (Pin 14)
Ω
(± 15%)
ns
V/µs
MSPS
ns
pV-sec
V
V (max)
mA (max)
2 to 20 (30)
20
0
0
20
–0.7 to +3.0
–1.1 to +3.0
750
5
400
100
1.8
200
–1.26
0 to –1.1 (–2)
0 to –5 (–7.5 )
Large Signal Bandwidth (–3dB Point)
POWER REQUIREMENTS
–5.2 V
±
0.25
+5.0 V
±
0.25
Power Dissipation
Power Supply Sensitivity
5
TEMPERATURE RANGES
6
Operating
AD9768JD
AD9768SD/SE
Storage
THERMAL RESlSTANCE
7
Junction to Air,
θ
JA
(Free Air)
Junction to Case,
θ
JA
PACKAGE OPTION
8
Ceramic (D-18)
LCC (E-20A)
mA
0 to 5
Ω
160
Measured at Pin 13; Digital “0” Applied
to Bits 1-8:
1 mA I
M
Input = 0 mA I
OUT
5 mA I
M
Input = 0 mA I
OUT
Measured at Pin 13; Digital “1” Applied
to Bits 1-8:
1 mA I
M
Input = 4 mA I
OUT
5 mA I
M
Input = 20 mA I
OUT
MHz
40
mA (max)
mA (max)
mW (max)
%/%
66(70)
14(15)
410(430)
0.07
°C
°C
°C
°C/W
°C/W
AD9768JD
AD9768SD
AD9768SE
0 to +70
–55 to +125
–55 to +150
90
20
VOLTAGE-MULTIPLYING MODE
4
(See Figure 2)
V
M
Range (at Pin 16)
V
±
0.5
V
M
Center
V
–0.6
Resistance (at Pin 16)
kΩ
800
Transfer Function –
Measured at Pin 13; Digital “0” Applied
to Bits 1-8:
–0.1 V
M
Input = 0 mA I
OUT
–1.1 V
M
Input = 0 mA I
OUT
Measured at Pin 13; Digital “1” Applied
to Bits 1-8:
–0.1 V
M
Input = 1 mA I
OUT
–1.1 V
M
Input = 20 mA I
OUT
Large Signal Bandwidth (–3 dB Point)
kHz
250
NOTES
1
Relative to FS, including linearity (within voltage compliance limits).
2
Worst case settling time; includes FS and Most Significant Bit (MSB) transitions.
3
Applies when operating AD9768 as standard D/A.
4
Based on R
L
= 50 ohms; R
SET
= 220 ohms; V
RET
= 0 V.
5
1% change in either power supply voltage causes 0.07% change in analog output.
6
Case temperature.
7
Maximum junction temperature 125°C.
8
D = Ceramic DIP, E = Leadless Ceramic Chip Carrier.
Specifications subject to change without notice.
AD9768SD D/A Schematic
–2–
REV. A
AD [ ANALOG DEVICES ]
