ADF5001
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
15 VDD1
14 VDD2
16 GND
13 GND
GND 1
RFIN 2
GND 3
GND 4
PIN 1
INDICATOR
12 GND
11 RFOUTB
10 RFOUT
9 GND
ADF5001
TOP VIEW
(Not to Scale)
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PADDLE MUST BE
CONNECTED TO GND.
GND 8
GND 5
NC 6
CE 7
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
RF Ground. All ground pins should be tied together.
1, 3, 4, 5, 8, 9, 12, GND
13, 16
2
RFIN
Single-Ended 50 Ω Input to the RF Prescaler. This pin is ac-coupled internally via a 3 pF capacitor.
6
NC
No Connect. This pin can be left unconnected.
7
CE
Chip Enable. This pin is active high. When CE is brought low, the part enters into power-down mode. If
this functionality is not required, the pin can be left unconnected because it will be pulled up internally
through a weak pull-up resistor.
10
RFOUT
Divided Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an
ac-coupling capacitor of 1pF.
11
RFOUTB
Complementary Divided Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied
to VDD2 and an ac-coupling capacitor of 1 pF.
14
VDD2
Voltage Supply for the Output Stage. This pin should be decoupled to ground with a 1 nF capacitor and
can be tied directly to VDD1.
15
VDD1
Voltage Supply for the Input Stage and Divider Block. This pin should be decoupled to ground with a
1 nF capacitor.
EPAD
The LFCSP package has an exposed paddle that must be connected to GND.
Rev. 0 | Page 5 of 12
08402-002
AD [ ANALOG DEVICES ]
