ADM705–ADM708
T
A
= 25 C
5V
V
CC
5V
4V
If, in the event of inactivity on the WDI line, a system reset is
required, then the
WDO
output should be connected to the
MR
input as shown in Figure 16.
RESET
RESET
ADM705/
ADM706
WDI
RESET
P
I/O LINE
MR
GND
WDO
0V
Figure 16.
RESET
from
WDO
Monitoring Additional Supply Levels
2 s/DIV
Figure 14. ADM705/ADM707
RESET
Response Time
APPLICATIONS
A Typical Operating Circuit is shown in Figure 15. The unregu-
lated dc input supply is monitored using the PFI input via the
resistive divider network. Resistors R1 and R2 should be selected
so that when the supply voltage drops below the desired level
(e.g., 8 V), the voltage on PFI drops below the 1.25 V threshold
thereby generating an interrupt to the
µP.
Monitoring the pre-
regulator input gives additional time to execute an orderly
shutdown procedure before power is lost.
ADM666
IN
UNREGULATED
DC
GND
OUT
5V
It is possible to use the power-fail comparator to monitor a
second supply as shown in Figure 17. The two sensing resistors,
R1 and R2, are selected so that the voltage on PFI drops below
1.25 V at the minimum acceptable input supply. The
PFO
output may be connected to the
MR
input so that a RESET is
generated when the supply drops out of tolerance. In this case, if
either supply drops out of tolerance, a
RESET
will be generated.
V
X
5V
V
CC
RESET
R1
RESET
ADM705/
ADM706
PFI
MR
GND
PFO
P
R2
Figure 17. Monitoring 5 V and an Additional Supply, V
X
V
CC
R1
RESET
WDI
RESET
I/O LINE
V
CC
Ps With Bidirectional
RESET
ADM705/
ADM706
PFI
MR
WDO
GND
PFO
NMI
P
INTERRUPT
R2
MANUAL
RESET
In order to prevent contention for microprocessors with a bidi-
rectional reset line, a current limiting resistor should be inserted
between the ADM70x
RESET
output pin and the
µP
reset pin.
This will limit the current to a safe level if there are conflicting
output reset levels. A suitable resistor value is 4.7 kΩ. If the
reset output is required for other uses, it should be buffered as
shown in Figure 18.
5V
BUFFERED
RESET
Figure 15. Typical Application Circuit
Microprocessor activity is monitored using the WDI input. This
is driven using an output line from the processor. The software
routines should toggle this line at least once every 1.6 seconds.
If a problem occurs and this line is not toggled,
WDO
goes low
and a nonmaskable interrupt is generated. This interrupt rou-
tine may be used to clear the problem.
V
CC
ADM70x
RESET
GND
RESET
P
GND
Figure 18. Bidirectional I-O
RESET
REV. B
–7–
AD [ ANALOG DEVICES ]
