ADN8830
response of the TEC’s temperature either in terms of settling time
or maximum current change. Details of how to adjust the compen-
sation network are given in the Compensation Loop section.
The ADN8830 can be easily integrated with a wavelength locker
for fine-tune temperature adjustment of the laser diode for a
specific wavelength. This is a useful topology for tunable wave-
length lasers. Details are highlighted in the Using the TEC
Controller ADN8830 with a Wave Locker section.
The TEC is driven differentially using an H-bridge configura-
tion to maximize the output voltage swing. The ADN8830
drives external transistors that are used to provide current to the
TEC. These transistors can be selected by the user based on the
maximum output current required for the TEC. The maximum
voltage across the TEC can be set through use of the VLIM pin
on the ADN8830.
To further improve the power efficiency of the system, one side
of the H-bridge uses a switched output. Only one inductor and
one capacitor are required to filter out the switching frequency.
The output voltage ripple is a function of the output inductor
and capacitor and the switching frequency. For most applica-
tions, a 4.7
µH
inductor, 22
µF
capacitor, and switching frequency
of 1 MHz maintains less than
±
0.5% worst-case output voltage
ripple across the TEC. The other side of the H-bridge does not
require any additional circuitry.
The oscillator section of the ADN8830 controls the switched
output section. A single resistor sets the switching frequency
from 100 kHz to 1 MHz. The clock output is available at the
SYNCOUT pin and can be used to drive another ADN8830
device by connecting to its SYNCIN pin. The phase of the
clock is adjusted by a voltage applied to the PHASE pin, which
can be set by a simple resistor divider. Phase adjustment allows
two or more ADN8830 devices to operate from the same clock
frequency and not have all outputs switch simultaneously, which
could create an excessive power supply ripple. Details of how to
adjust the clock frequency and phase are given in the Setting the
Switching Frequency section.
For effective indication of a catastrophic system failure, the
ADN8830 alerts to open-circuit or short-circuit conditions from the
thermistor, preventing an erroneous and potentially damaging
temperature correction from occurring. With some additional
external circuitry, output overcurrent detection can be imple-
mented to provide warning in the event of a TEC short-circuit
failure. This circuit is highlighted in the Setting Maximum
Output Current and Short-Circuit Protection section.
Signal Flow Diagram
simple integrator or PID loop, the dc forward gain of the
compensation section is equal to the open-loop gain of the
compensation amplifier, which is over 80 dB or 10,000. The
output from the compensation loop at COMPOUT is then fed
to the linear amplifier. The output of the linear amplifier at
OUT B is fed with COMPOUT into the PWM amplifier whose
output is OUT A. These two outputs provide the voltage drive
directly to the TEC. Including the external transistors, the gain of
the differential output section is fixed at 4. Details on the output
amplifiers can be found in the Output Driver Amplifiers section.
1.5V
4
TEMPSET
THERMIN
2
INPUT
AMPLIFIER
1.5V
A
V
= 20
9
A
V
= Z2/Z1
12
TEMPCTL
Z1
13
COMPFB
Z2
A
V
= 4
14
COMPOUT
COMPENSATION PWM/LINEAR
AMPLIFIERS
AMPLIFIER
19
OUT A
OUT B
Figure 2. Signal Flow Block Diagram of the ADN8830
Thermistor Setup
The temperature of the thermal object, such as a laser diode, is
detected with a negative temperature coefficient (NTC) thermistor.
The thermistor’s resistance exhibits an exponential relationship to
the inverse of temperature, meaning the resistance decreases at
higher temperatures. Thus, by measuring the thermistor resistance,
temperature can be ascertained. Betatherm is a leading supplier
of NTC thermistors. Thermistor information and details can be
found at www.betatherm.com.
For this application, the resistance is measured using a voltage
divider. The thermistor is connected between THERMIN (Pin 2)
and AGND (Pin 30). Another resistor (R
X
) is connected between
VREF (Pin 7) and THERMIN (Pin 2), creating a voltage divider
for the VREF voltage. Figure 3 shows the schematic for this
configuration.
V
DD
8
7
R
X
2
ADN8830
R
THERM
30
Figure 2 shows the signal flow diagram through the ADN8830.
The input amplifier is fixed with a gain of 20. The voltage at
TEMPCTL
can be expressed as
TEMPCTL
=
20
×
TEMPSET
–
THERMIN
+
1.5
(
)
(1)
Figure 3. Connecting a Thermistor to the ADN8830
When the temperature is settled, the thermistor voltage will be
equal to the
TEMPSET
voltage, and the output of the input
amplifier will be 1.5 V.
The voltage at TEMPCTL is then fed into the compensation
amplifier whose frequency response is dictated by the compen-
sation network. Details on the compensation amplifier can be
found in the Compensation Loop section. When configured as a
With the thermistor connected from THERMIN to AGND, the
voltage at THERMIN will decrease as temperature increases.
To maintain the proper input-to-output polarity in this configu-
ration, OUT A (Pin 19) should connect to the TEC– pin on the
TEC, and OUT B (Pin 9) should connect to the VTEC+ pin.
The thermistor can also be connected from VREF to THERMIN
with R
X
connecting to ground. In this case, OUT A must connect to
TEC+ with OUT B connected to TEC– for proper operation.
–8–
REV. C
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