OP177–SPECIFICATIONS
(@ VS = ؎15 V, –40°C ≤ TA ≤ +85؇C, unless otherwise noted)
ELECTRICAL CHARACTERISTICS
OP177E
Typ
OP177F
Typ
OP177G
Typ
Parameter
Symbol
Conditions
Min
Max
Min
Max
Min
Max
Units
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Average Input Offset
Current Drift
Input Bias Current
Average Input Bias
Current Drift
Input Voltage Range
Common-Mode
Rejection Ratio
VOS
10
20
15
40
20
100
µV
TCVOS
IOS
(Note 1)
(Note 2)
0.03
0.5
0.1
1.5
0.1
0.5
0.3
2.2
0.7
0.5
1.2
4.5
µV/°C
nA
TCIOS
IB
1.5
2.4
25
4
1.5
2.4
40
4
1.5
2.4
85
±6.0
pA/°C
nA
–0.2
–0.2
TCIB
IVR
(Note 2)
(Note 3)
8
25
8
40
15
60
pA/°C
V
±13
120
120
±13.5
±13
120
110
±13.5
±13.0 ±13.5
CMRR
PSRR
V
V
CM = ±13 V
140
125
140
120
110
140
dB
dB
Power Supply Rejection
Ratio
S = ±3 V to ±18 V
106
115
Large-Signal
Voltage Gain
Output Voltage Swing
Power Consumption
Supply Current
AVO
VO
PD
RL ≥ 2 kΩ, VO = ±10 V4 2000
6000
±13.0
60
2000
±12
6000
±13.0
60
1000
±12.0 ±13.0
4000
V/mV
V
mW
mA
RL ≥ 2 kΩ
±12
VS = ±15 V, No Load
VS = ±15 V, No Load
75
2.5
75
2.5
60
2.0
75
2.5
ISY
2.0
2.0
NOTES
1OP177E: TCVOS is 100% tested.
2Guaranteed by endpoint limits.
3Guaranteed by CMRR test condition.
4To insure high open-loop gain throughout the ±10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
Figure 2. Typical Offset Voltage Test Circuit
Figure 3. Optional Offset Nulling Circuit
–4–
REV. B
ADI [ ADI ]
