Figure 7
AC Waveforms for Read Operations
t
RC
Addresses
t
ACC
CE
t
DF
OE
t
OE
Addresses Stable
WE
t
CE
Outputs
High Z
t
OH
Output Valid
High Z
Figure 8
Write/Erase/Program
Operation, WE Controlled
Data Polling
Addresses
5555H
t
WC
CE
t
GHWL
OE
t
WP
WE
t
CE
t
DH
AOH
Data
t
DS
PD
D7
D
OUT
t
OH
t
OE
t
WPH
t
DF
t
WHWH
1
t
AS
PA
t
AH
PA
t
RC
5.0V
t
CE
Notes:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the 0utput of the complement of the data written to the deviced.
4. Dout is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
Aeroflex Circuit Technology
13
SCD1667 REV A 4/28/97 Plainview NY (516) 694-6700