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ACT-F128K32N-090F5T 参数 Datasheet PDF下载

ACT-F128K32N-090F5T图片预览
型号: ACT-F128K32N-090F5T
PDF下载: 下载PDF文件 查看货源
内容描述: ACT- F128K32高速4兆位闪存多芯片模块 [ACT-F128K32 High Speed 4 Megabit FLASH Multichip Module]
分类和应用: 闪存
文件页数/大小: 20 页 / 203 K
品牌: AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
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ACT–F128K32 High Speed
4 Megabit FLASH Multichip Module
CIRCUIT TECHNOLOGY
Features
s
4 Low Power 128K x 8 FLASH Die in One MCM
www.aeroflex.com
s
MIL-PRF-38534 Compliant MCMs Available
s
Industry Standard Pinouts
s
Packaging – Hermetic Ceramic
Package
s
Organized as 128K x 32
q
User Configurable to 256K x 16 or 512K x 8
q
Upgradable to 512K x 32 in same Package Style
s
Access Times of 60, 70, 90, 120 and 150ns
s
+5V Programing, 5V ±10% Supply
s
100,000 Erase/Program Cycles Typical, 0°C to +70°C
s
Low Standby Current
s
TTL Compatible Inputs and CMOS Outputs
s
Embedded Erase and Program Algorithms
s
Page Program Operation and Internal Program
Control Time
s
Commercial, Industrial and Military Temperature
Ranges
Lead, .88" x .88" x .160" Single-Cavity Small
Outline gull wing, Aeroflex code# "F5"
(Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
q
66 Pin, 1.08" x 1.08" x .160" PGA Type, No
Shoulder, Aeroflex code# "P3"
q
66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
s
Sector Architecture (Each Die)
q
8 Equal size sectors of 64K bytes each
q
Any Combination of Sectors can be erased with
one command sequence
q
Supports Full Chip Erase
s
DESC SMD# 5962–94716 Released (P3,P7,F5)
q
68
Block Diagram – PGA Type Package(P3,P7) & CQFP(F5)
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
OE
A
0
–A
16
128Kx8
8
I/O
0-7
128Kx8
8
I/O
8-15
128Kx8
8
I/O
16-23
128Kx8
8
I/O
24-31
General Description
The ACT–F128K32 is a high
speed, 4 megabit CMOS flash
multichip
module
(MCM)
designed for full temperature
range military, space, or high
reliability applications.
The MCM can be organized
as a 128K x 32 bits, 256K x 16
bits or 512K x 8 bits device and
is input TTL and output CMOS
compatible.
The
command
register is written by bringing
WE to a logic low level (V
IL
),
while CE is low and OE is at
logic high level (V
IH
)
. Reading is
accomplished by chip Enable
(CE) and Output Enable (OE)
being logically active, see
Figure 9. Access time grades of
60ns, 70ns, 90ns, 120ns and
150ns maximum are standard.
The
ACT–F128K32
is
packaged in a hermetically
Pin Description
I/O
0-31
Data I/O
A
0–16
Address Inputs
WE
1-4
Write Enables
CE
1-4
OE
V
CC
GND
NC
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules © SCD1667 REV A 4/28/98