欢迎访问ic37.com |
会员登录 免费注册
发布采购

ACT-SF128K16N-37F18T 参数 Datasheet PDF下载

ACT-SF128K16N-37F18T图片预览
型号: ACT-SF128K16N-37F18T
PDF下载: 下载PDF文件 查看货源
内容描述: ACT- SF128K16高速128Kx16 SRAM /闪存多芯片模块 [ACT-SF128K16 High Speed 128Kx16 SRAM/FLASH Multichip Module]
分类和应用: 闪存静态存储器
文件页数/大小: 11 页 / 171 K
品牌: AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
 浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第2页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第3页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第4页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第5页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第6页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第7页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第8页浏览型号ACT-SF128K16N-37F18T的Datasheet PDF文件第9页  
ACT–SF128K16 High Speed
128Kx16 SRAM/FLASH Multichip Module
CIRCUIT TECHNOLOGY
FEATURES
www.aeroflex.com
s
Packaging – Hermetic Ceramic
s
2 – 128K x 8 SRAMs & 2 – 128K x 8 Flash Die in
One MCM
s
Access Times of 25ns (SRAM) and 60ns (Flash)
or
35ns (SRAM) and 70 or 90ns (Flash)
s
128K x 16 SRAM
s
128K x 16 5V Flash
s
Organized as 128K x 16 of SRAM and 128K x 16 of
Flash Memory with Separate Data Buses
s
Both Blocks of Memory are User Configurable as
256K x 8
s
Low Power CMOS
s
Input and Output TTL Compatible Design
s
MIL-PRF-38534 Compliant MCMs Available
s
Decoupling Capacitors and Multiple Grounds for Low
Noise
s
Industrial and Military Temperature Ranges
s
Industry Standard Pinouts
Note: Programming information available upon request
66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,
Aeroflex code# "P3"
q
66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
q
68 Lead, .94" x .94" x .140" Single-Cavity Small
Outline Gull Wing, Aeroflex code# "F18"
(Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
s
DESC SMD Pending – 5962-96900
q
FLASH MEMORY FEATURES
s
Sector Architecture (Each Die)
s
s
s
s
s
Equal Sectors of 16K bytes each
q
Any combination of sectors can be erased with one
command sequence.
+5V Programing, 5V ±10% Supply
Embedded Erase and Program Algorithms
Hardware and Software Write Protection
Internal Program Control Time.
10,000 Erase/Program Cycles
q
8
Block Diagram – PGA Type Package (P3,P7) and CQFP (F18)
Pin Description
SWE
1
SCE
1
SWE
2
SCE
2
FWE
1
FCE
1
FWE
2
FCE
2
FI/O
0-15
OE
A
0
A
16
128Kx8
SRAM
8
SI/O
0-7
128Kx8
SRAM
8
SI/O
8-15
128Kx8
Flash
8
FI/O
0-7
128Kx8
Flash
8
FI/O
8-15
SI/O
0-15
A
0–16
FWE
1-2
Flash Data I/O
SRAM Data I/O
Address Inputs
Flash Write Enables
SWE
1-2
SRAM Write Enables
FCE
1-2
SCE
1-2
OE
NC
V
CC
GND
Flash Chip Enables
SRAM Chip Enables
Output Enable
Not Connected
Power Supply
Ground
eroflex Circuit Technology - Advanced Multichip Modules © SCD1677 REV A 4/28/98