ACT-SF128K32 High Speed
128Kx32 SRAM / 128Kx32 Flash
Multichip Module
CIRCUIT TECHNOLOGY
www.aeroflex.com
FEATURES
s
4 – 128K x 8 SRAMs & 4 – 128K x 8 Flash Die
in One MCM
s
Access Times of 25ns (SRAM) and 60ns
(Flash) or 35ns (SRAM) and 70ns or
90ns (Flash)
s
Organized as 128K x 32 of SRAM and 128K x
32 of Flash Memory with Common Data Bus
s
Low Power CMOS
s
Input and Output TTL Compatible Design
s
MIL-PRF-38534 Compliant MCMs Available
s
Decoupling Capacitors and Multiple
Grounds for Low Noise
s
Commercial, Industrial and Military
Temperature Ranges
s
Industry Standard Pinouts
s
TTL Compatible Inputs and Outputs
s
Packaging – Hermetic Ceramic
q
FLASH MEMORY FEATURES
s
Sector Architecture (Each Die)
Equal Sectors of 16K bytes each
q
Any combination of sectors can be erased with
one command sequence.
q
8
+5V Programing, +5V Supply
s
Embedded Erase and Program Algorithms
s
Hardware and Software Write Protection
s
Page Program Operation and Internal
Program Control Time.
s
10,000 Erase/Program Cycles
s
A E
RO
F
LE
X
LA
B
S
I
NC
.
66–Lead, PGA-Type, 1.385"SQ x 0.245"max,
Aeroflex code# P3,P7 without/with shoulders
C
ISO
9001
E
RT
I
F
I
E
D
Block Diagram – PGA Type Package (P3 & P7)
FWE
1
SWE
1
OE
A
0
–A
16
SCE
FCS
FWE
2
SWE
2
FWE
3
SWE
3
FWE
4
SWE
4
PIN DESCRIPTION
I/O
0-31
A
0–16
FWE
1-4
Data I/O
Address Inputs
Flash Write Enables
SWE
1-4
SRAM Write Enables
128K
X
8 F
LASH
128K
X
8 SRAM
128K
X
8 F
LASH
128K
X
8 SRAM
128K
X
8 F
LASH
128K
X
8 SRAM
128K
X
8 F
LASH
128K
X
8 SRAM
FCE
SCE
OE
NC
V
CC
GND
Flash Chip Enable
SRAM Chip Enable
Output Enable
Not Connected
Power Supply
Ground
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
eroflex Circuit Technology - Advanced Multichip Modules © SCD3850 REV A 5/20/98
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
