ACT–SF2816 High Speed
128Kx16 SRAM / 512Kx16 FLASH
Multichip Module
CIRCUIT TECHNOLOGY
FEATURES
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www.aeroflex.com
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2 – 128K x 8 SRAMs & 2 – 512K x 8 Flash Die in
One MCM
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Access Times of 25ns (SRAM) and 60ns (Flash)
or
35ns (SRAM) and 70 or 90ns (Flash)
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Organized as 128K x 16 of SRAM and 512K x 16
of Flash Memory with Separate Data Buses
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Both Blocks of Memory are User Configurable as
512KX8 AND 1MX8 Respectively
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Low Power CMOS
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Input and Output TTL Compatible Design
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MIL-PRF-38534 Compliant MCMs Available
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Decoupling Capacitors and Multiple Grounds for
Low Noise
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Industrial and Military Temperature Ranges
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Industry Standard Pinouts
Note: Programming information available upon request
Packaging – Hermetic Ceramic
66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,
Aeroflex code# "P3"
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66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
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68 Lead, .94" x .94" x .140" Single-Cavity Small
Outline Gull Wing, Aeroflex code# "F18"
(Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
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DESC SMD – TBD
Sector Architecture (Each Die)
Equal Sectors of 64K bytes each
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Any combination of sectors can be erased with one
command sequence
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FLASH MEMORY FEATURES
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+5V Programing, +5V Supply
Embedded Erase and Program Algorithms
Hardware and Software Write Protection
Internal Program Control Time.
10,000 Erase / Program Cycles
Block Diagram – PGA Type Packages (P3 & P7) & CQFP (F18)
Pin Description
SWE
1
SCE
1
SWE
2
SCE
2
OE
A
0
–
A
18
128Kx8
SRAM
8
SI/O
0-7
128Kx8
SRAM
8
SI/O
8-15
512Kx8
Flash
8
FI/O
0-7
512Kx8
Flash
8
FI/O
8-15
FWE
1
FCE
1
FWE
2
FCE
2
FI/O
0-15
SI/O
0-15
A
0–18
FWE
1-2
Flash Data I/O
SRAM Data I/O
Address Inputs
Flash Write Enables
SWE
1-2
SRAM Write Enables
FCE
1-2
SCE
1-2
OE
NC
V
CC
GND
Flash Chip Enables
SRAM Chip Enables
Output Enable
Not Connected
Power Supply
Ground
eroflex Circuit Technology - Advanced Multichip Modules © SCD3853 REV B 5/18/99