Functional Description and Pinout (con’t)
Pin #
Pin Name
Function
43-60
1-14
32 Bit Parallel
Word Input
(Pin 43 MSB)
(Pin 14 LBS)
32 Bit Parallel Input for Data Word. This data is latched into
the 32 Bit register on a Sys Clr/Load positive going edge.
16
15
Sync Bit
WI Bit
Input for Sync Bit which is latched into the 2 Bit Register on
a Sys Clr/Load positive going edge (Sync Bit always logic
high).
Input for Word Identifier Bit Which is latched into the 2 Bit
register on a Sys Clr/Load positive going edge.
4 Bit SIS/SOS Input:
Bit 4 (MSB)
C/I
4 Bit Parallel Input for SIS/SOS which is latched into the 4
Bit SIS/SOS Register on a Sys Clr/Load positive going
edge.
24
25
26
27
Data
Sync (LSB)
34
External Encoder
Inhibit
Asynchronous inhibit. A low forces DATA and DATA to a
common high state and DATAST and DATA to a common
st
low state.
17
18
19
23
28
30
35
Grounds. All ground pins are common and connected to
hybrid case.
1/ Equal loads must be applied to these output pairs.
7
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