AC CHARACTERISTICS WRITE CYCLE1
(VDD = 5.0V±10%)
7C138 - 45
7C139 - 45
7C138 - 55
7C139 - 55
SYMBOL
PARAMETER
UNIT
MIN
MAX
MIN
MAX
tWC
tSCE
tAW
tHA
Write cycle time
CE LOW to write end
Address set-up to write end
Address hold from write end
Address set-up to write start
Write pulse width
45
40
40
0
55
50
50
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
tSA
0
0
tPWE
tSD
40
40
0
50
50
0
Data set-up to write end
Data hold from write end
R/W LOW to high Z
tHD
20
20
tHZWE
tLZWE
tWDD
R/W HIGH to low Z
Write pulse to data delay
Write data valid to read data valid
Write disable time
0
95
95
5
0
ns
ns
ns
ns
105
105
5
tDDD
tWHWL
Notes:
1. For information on part-to-part delay through DPRAM cells from writing port to reading port, refer to Read Timing with Port-to-Port Delay waveform (see figure 3c).
9
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
