Agamem Mircoelectronics Inc. AA16 Series
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PRELIMINARY
Voltage detector with delay
Fig-1 : Reset & Reset Disable Transfer Point
Vcc
Vcc
VRSD
VRS
Vout
Vcc
*
VRSD, reset disable voltage, is the detected output point when Vcc is increasing. VRS, reset
voltage, is the detected output point when Vcc is decreasing. TRSD and TRS is the corresponding
delay time between the VRSD and VRS to the rising edge and falling edge of Vout.
** After Vout is settled, its rising and falling slope should be equal to the slope of Vcc because
there is only a resistance between Vcc and Vout. The maximum value of Vout is equal to the one
of Vcc, too.
6
2007/6/21
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