FW802A Low-Power PHY
IEEE
1394A-2000
Two-Cable Transceiver/Arbiter Device
Data Sheet, Rev. 3
June 2001
Internal Register Configuration
The PHY register map is shown below in Table 8.
Table 8. PHY Register Map for the Cable Environment
Address
Bit 0
0000
2
0001
2
0010
2
0011
2
0100
2
0101
2
0110
2
0111
2
1000
2
1111
2
REQUIRED
LCtrl
Resume_int
RHB
IBR
Extended (7)
Max_speed
Contender
ISBR
Loop
Bit 1
Bit 2
Physical_ID
Gap_count
Contents
Bit 3
Bit 4
Bit 5
Bit 6
R
Total_ports
Delay
Pwr_class
Timeout
Port_event Enab_accel Enab_multi
Bit 7
PS
XXXXX
XXXXX
Jitter
Pwr_fail
XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX
Page_select
Port_select
XXXXX
Register 0
Page_select
Register 7
Page_select
XXXXX
RESERVED
The meaning of the register fields within the PHY register map are defined by Table 9 below. Power reset values
not specified are resolved by the operation of the PHY state machines subsequent to a power reset.
Table 9. PHY Register Fields for the Cable Environment
Field
Physical_ID
Size Type
6
r
Power Reset
Value
000000
Description
The address of this node determined during self-identification. A
value of 63 indicates a malconfigured bus; the link will not transmit
any packets.
When set to one, indicates that this node is the root.
Cable power active.
Root hold-off bit. When set to one, the force_root variable is TRUE,
which instructs the PHY to attempt to become the root during the
next tree identify process.
Initiate bus reset. When set to one, instructs the PHY to set ibr
TRUE and reset_time to RESET_TIME. These values in turn
cause the PHY to initiate a bus reset without arbitration; the reset
signal is asserted for 166
µs.
This bit is self-clearing.
Used to configure the arbitration timer setting in order to optimize
gap times according to the topology of the bus. See Section 4.3.6
of
IEEE
Standard 1394-1995 for the encoding of this field.
This field has a constant value of seven, which indicates the
extended PHY register map.
Agere Systems Inc.
R
PS
RHB
1
1
1
r
r
rw
0
—
0
IBR
1
rw
0
Gap_count
6
rw
3F
16
Extended
18
3
r
7
AGERE [ AGERE SYSTEMS ]
