Data Sheet
August 1999
LG1600FXH Clock and Data Regenerator
Features
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Integrated clock recovery and data retiming
Surface-mount package
Single ECL supply
Robust FPLL design
Operation up to BER = 1e
–3
SONET/SDH compatible loss of signal alarm
High effective Q allows long run lengths
Jitter tolerance exceeding ITU-T/Bellcore
Low clock jitter generation: typical <0.005 UI
Standard and custom data rates
0.50 Gbits/s—5.5 Gbits/s
Complementary 50
Ω
I/Os
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Figure 1. LG1600FXH Open View
Applications
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SONET/SDH receiver terminals and regenerators
OC-12 through OC-96/STM-4 through STM-32
SONET/SDH test equipment
Proprietary bit rate systems
Digital video transmission
Clock doublers and quadruplers
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