ORCA
Series 3C and 3T FPGAs
Data Sheet
June 1999
Programmable Input/Output Cells
(continued)
PLC
ADDRESS
FROM
ROUTING
DATA
FROM
ROUTING
CLK
PIC
OUT1
OUT2
PIO
LOGIC
PAD
CLK
OUT1
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
OUT2 DATA1
DATA2
DATA3
DATA4
DATA5
PIC OUTPUT
ADDR1
DATA1
ADDR2
DATA2
ADDR3
DATA3
ADDR4
DATA4
NOTE: PIO LOGIC MODE, OUT1OUT2
5-5799(F)
Figure 25. Output Multiplexing (OUT1OUT2 Mode)
PLC
ADDRESS
FROM
ROUTING
CLK
PIC
OUT1
D
Q
DATA
FROM
ROUTING
OUT2
P/O
LOGIC
PAD
CLK
ADDR ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
DATA
DATA1
DATA2
DATA3
DATA4
REG ADDRESS
ADDR1
ADDR2
ADDR3
ADDR4
PAD
ADDR1
DATA1
ADDR2
DATA2
ADDR3
DATA3
ADDR4
NOTE: PIO LOGIC MODE, OUT1OUT2
5-5797(F)
Figure 26. Output Multiplexing (OUT2OUTREG Mode)
42
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
