Data Sheet
June 1999
ORCA
Series 3C and 3T FPGAs
Input/Output Buffer Measurement Conditions
V
CC
GND
TO THE OUTPUT UNDER TEST
50 pF
TO THE OUTPUT UNDER TEST
1 kΩ
50 pF
A. Load Used to Measure Propagation Delay
Note: Switch to V
DD
for T
PLZ
/T
PZL
; switch to GND for T
PHZ
/T
PZH
.
B. Load Used to Measure Rising/Falling Edges
5-3234(F)
Figure 89. ac Test Loads
ts[i]
out[i]
PAD ac TEST LOADS (SHOWN ABOVE)
OUT
V
DD
out[i] V
DD
/2
V
SS
PAD 1.5 V
OUT 0.0 V
T
PLL
T
PHH
5-3233.a(F)
Figure 90. Output Buffer Delays
PAD
IN
in[i]
3.0 V
PAD IN 1.5 V
0.0 V
V
DD
in[i] V
DD
/2
V
SS
T
PLL
T
PHH
5-3235(F)
Figure 91. Input Buffer Delays
Lucent Technologies Inc.
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