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T8301 参数 Datasheet PDF下载

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型号: T8301
PDF下载: 下载PDF文件 查看货源
内容描述: T8301互联网协议电话电话-ON- A- Chip⑩ IP解决方案DSP [T8301 Internet Protocol Telephone Phone-On-A-Chip⑩ IP Solution DSP]
分类和应用: 电信集成电路电话
文件页数/大小: 190 页 / 1514 K
品牌: AGERE [ AGERE SYSTEMS ]
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Advance Data Sheet
December 2000
T8301 Internet Protocol Telephone
Phone-On-A-Chip™
IP Solution DSP
1 Introduction
Lucent Technologies’
Phone-On-A-Chip
IP Solution
is a highly integrated set of IC chips that form the
basic building blocks for an internet protocol tele-
phone (IPT), residing on a local area network (LAN).
The IPT presently consists of two ICs—the T8301
(IPT_DSP) and the T8302 (IPT_ARM*).
The T8301 provides the audio processing engine for
voice compression and decompression, speaker-
phone echo cancellation, digital-to-analog and ana-
log-to-digital converters, low-pass filters, and
amplifiers to drive standard business telephone
handsets and speakerphone hardware.
The general-purpose processor chip T8302 controls
system I/O (Ethernet, USB, IrDA, etc.) and provides
general telephone control features (LED control, key-
pad button scanning, LCD module interface, etc.).
A block diagram of the T8301 can be found in
Figure 3 on page 8.
Since the DSP1627 is an integral part of the T8301,
we will refer to the
DSP1627 Digital Signal Processor
Data Sheet throughout this discussion.
s
Dual-port RAM, 6K x 16 (zero wait-state at
80 MHz).
Internal SRAM, 16K x 16 (single wait-state at
80 MHz).
16-bit analog-to-digital converter.
Programmable gain amplifier on audio input.
Fixed gain differential microphone input.
Analog input SRAM buffer, 512 x 16.
Timed DMA for analog input SRAM.
Two 16-bit digital-to-analog converters.
Independent simultaneous speaker and handset
outputs.
Two integrated differential speaker driver outputs.
Two analog output SRAM buffers, 512 x 16 each.
Two timed DMA outputs for simultaneous handset
and speaker audio output.
Low-pass filtering on audio inputs and outputs.
Serial I/O interface.
General-purpose timer counter.
Bit I/O interface.
JTAG test and debugging control.
Implementation in 0.35
µm,
5 V silicon technology.
Packaged in 100-pin TQFP
.
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1.1 Features
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DSP1627 core with bit manipulation unit.
DSP clock speeds up to 80 MHz.
Instruction ROM, 32K x 16 (zero wait-state
at 80 MHz).
*
ARM
is a registered trademark of Advanced RISC Machines Lim-
ited.