Preliminary Data Sheet
September 2001
T8531A/T8532 Multichannel Programmable
Codec Chip Set
Features
s
s
Few or no SLIC/codec interface components
required
Sigma-delta converters with dither noise reduction
Serial microcontroller control interface
Meets or exceeds ITU-T G.711—G.712 and rele-
vant
Telcordia Technologies
™
requirements
Available in 64-pin MQFP and TQFP packages
Per-channel programmable gain and hybrid bal-
ance
Programmable termination impedances
Programmable
µ-law,
A-law, or linear PCM output
Tone plant:
— DTMF generator
— DTMF receiver
— Caller ID generator
— Call progress tones generator
Test utilities:
— Automatic gain calibration
— Tone generation
— dc generation
— dc measurement
— Variance computation
— Peak detection
Analog and digital loopbacks
Programmable time-slot assignment with bit offset
Low-noise, balanced, receive SLIC interface
s
s
s
s
s
s
s
General Description
The multichannel programmable codec chip set is
comprised of the T8531A 16-channel line card signal
processor and one or two custom T8532 octal A/D
and D/A converters. A ROM-coded tone plant, with
line-test and self-test utilities, is included on the sig-
nal processor. Together these devices achieve a
highly integrated and highly programmable multi-
channel voice codec solution.
Software is provided to compute the gain and filter
coefficients required to program the codec.
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s
s
s
VTX (8)
VRTX (8)
VRP (8)
VRN (8)
T8532
OCTAL
A/D
D/A
2
3
PCM
INTERFACE
VTX (8)
VRTX (8)
VRP (8)
VRN (8)
T8532
OCTAL
A/D
D/A
2
3
T8531A
DIGITAL
SIGNAL
PROCESSOR
ASIC
CK16
MICROPROCESSOR
INTERFACE
5-3793i (F)
Figure 1. System Block Diagram
AGERE [ AGERE SYSTEMS ]
