Hardware Design Guide, Revision 1
November 2, 2005
TSI-8
8K x 8K Time-Slot Interchanger
1 Introduction
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This document describes the hardware interfaces to the
Agere Systems Inc. TSI-8 device. Information relevant to
the use of the device in a board design is covered. Ball de-
scriptions, dc electrical characteristics, timing diagrams, ac
timing parameters, packaging, and operating conditions are
included.
1.1 Related Documents
More information on the TSI-8 is contained in the following
documents:
TSI-8 Product Description
TSI-8 Register Description
TSI-8 Systems Design Guide
2 Description
2.1 Block Diagram and High-Level Interface Definition
TEST PATTERN
GENERATOR
TEST PATTERN
MONITOR
TRANSLATION
TABLE LOOKUP
TEST ACCESS
PORT
8K X 8K
SWITCH
FABRIC
32
RECEIVE
CHI
TRANSMIT
CHI
32
DATA
STORE
WRITE ADDRESS
COUNTER
CONNECTION
STORE
READ ADDRESS
COUNTER
MICROPROCESSOR
INTERFACE
CLOCK
GENERATOR
Figure 2-1. Block Diagram and High-Level Interface Definition
AGERE [ AGERE SYSTEMS ]
