欢迎访问ic37.com |
会员登录 免费注册
发布采购

W3013BCL 参数 Datasheet PDF下载

W3013BCL图片预览
型号: W3013BCL
PDF下载: 下载PDF文件 查看货源
内容描述: W3013间接正交调制器增益控制 [W3013 Indirect Quadrature Modulator with Gain Control]
分类和应用: 电信集成电路光电二极管
文件页数/大小: 12 页 / 146 K
品牌: AGERE [ AGERE SYSTEMS ]
 浏览型号W3013BCL的Datasheet PDF文件第2页浏览型号W3013BCL的Datasheet PDF文件第3页浏览型号W3013BCL的Datasheet PDF文件第4页浏览型号W3013BCL的Datasheet PDF文件第5页浏览型号W3013BCL的Datasheet PDF文件第6页浏览型号W3013BCL的Datasheet PDF文件第7页浏览型号W3013BCL的Datasheet PDF文件第8页浏览型号W3013BCL的Datasheet PDF文件第9页  
Preliminary Data Sheet
November 1998
W3013 Indirect Quadrature Modulator
with Gain Control
Features
n
n
n
n
n
n
n
n
Description
The W3013 is a monolithic integrated circuit that
provides indirect, quadrature modulation of an RF
carrier by I & Q baseband inputs. The function
performed by the W3013 is particularly suited for
handheld digital cellular and digital cordless
telephones that operate between 800 MHz and
2.2 GHz.
The circuit block diagram is shown below. From a
single local-oscillator input (LO1), the phase
shifter produces two LO signals with 90° phase
separation and equal amplitude. The LO signals
are fed to the in-phase (I) and quadrature (Q)
double-balanced mixers. The resulting signals are
summed and fed into an RF mixer where the
frequency can be translated to over 2 GHz.
Outputs between the summer and RF mixer are
available for external filtering. Finally, the signal is
amplified to provide a single-ended output.
The ENB/APC input with a logic low allows the
device to be put into a powerdown mode. Above
the logic low threshold, the device enters a power
control mode that provides a range of desired
output power levels.
Low-voltage operation: 2.7 V
High-frequency operation: 2.2 GHz
High RF output power: –10 dBm
High-accuracy phase shifter, no trim required
Low carrier feedthrough: –45 dBc
Automatic power control (APC) capability
Low-current sleep mode
20-pin TSSOP package
Applications
n
n
n
n
n
n
North American IS-136
Japan PDC (RCR STD 27)
Japan PHS (RCR STD 28)
GSM 900, 1800, and 1900 MHz
Narrowband CDMA
Digital satellite communications
I
I
–π/4
LO1
LO1REF
+π/4
Q
Q
EXTERNAL
FILTER
RF
OUT
Ø
INTERNAL
LOW-PASS
FILTER
RF
OUT
POWER
CONTROL
LO2 LO2REF
ENAB/APC
Figure 1. Circuit Block Diagram