technology allowing CMOS logic
to be connected directly to the
inputs and outputs.
0.1 µF. For each capacitor, the
total lead length between both
ends of the capacitor and the
power-supply pins should not
exceed 20 mm. Figure 12
illustrates the recommended
printed circuit board layout for
the HPCL-0710.
Application Information
Bypassing and PC Board
Layout
The HCPL-0710 optocoupler is
extremely easy to use. No
external interface circuitry is
required because the HCPL-0710
uses high-speed CMOS IC
As shown in Figure 11, the only
external components required for
proper operation are two bypass
capacitors. Capacitor values
should be between 0.01 µF and
V
8
7
6
5
V
DD1
1
2
3
4
DD2
C1
C2
V
I
NC
NC
V
O
GND
GND
2
1
C1, C2 = 0.01 µF TO 0.1 µF
Figure 11. Recommended Printed Circuit Board Layout.
V
DD1
V
DD2
V
I
C1
C2
V
O
GND
GND
2
1
C1, C2 = 0.01 µF TO 0.1 µF
Figure 12. Recommended Printed Circuit Board Layout.