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HFBR-5905 参数 Datasheet PDF下载

HFBR-5905图片预览
型号: HFBR-5905
PDF下载: 下载PDF文件 查看货源
内容描述: ATM多模光纤收发器, 2× 5封装形式 [ATM Multimode Fiber Transceivers in 2 x 5 Package Style]
分类和应用: 光纤电信集成电路异步传输模式ATM
文件页数/大小: 15 页 / 279 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Solder and Wash Process
Compatibility
The transceivers are delivered
with protective process plugs
inserted into the MT-RJ
receptacle. This process plug
protects the optical
subassemblies during wave
solder and aqueous wash
processing and acts as a dust
cover during shipping.
These transceivers are compat-
ible with either industry
standard wave or hand solder
processes.
Shipping Container
The transceiver is packaged in a
shipping container designed to
protect it from mechanical and
ESD damage during shipment or
storage.
Board Layout - Decoupling Circuit,
Ground Planes and Termination
Circuits
It is important to take care in
the layout of your circuit board
to achieve optimum perform-
ance from these transceivers.
Figure 7 provides a good
example of a schematic for a
power supply decoupling circuit
that works well with these parts.
It is further recommended that a
contiguous ground plane be
provided in the circuit board
directly under the transceiver to
provide a low inductance
ground for signal return current.
This recommendation is in
keeping with good high
frequency board layout
practices. Figures 7 and 8 show
two recommended termination
schemes.
TERMINATE AT
TRANSCEIVER INPUTS
V
CC
(+3.3 V)
Board Layout - Hole Pattern
The Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
pattern defined in the original
multisource announcement
which defined the 2 x 5 package
style. This drawing is repro-
duced in Figure 9 with the
addition of
ANSI Y14.5M compliant
dimensioning to be used as a
guide in the mechanical layout
of your circuit board.
PHY DEVICE
V
CC
(+3.3 V)
10 nF
130
130
Z = 50
TD-
Z = 50
LVPECL
TD+
10
9
8
7
6
82
82
V
CC
(+3.3 V)
N/C o
TD+ o
V
EE
T
X
o
TD- o
V
CC
T
X
o
T
X
1 µH
C2
V
CC
(+3.3 V)
C3
10 µF
10 nF
130
130
RD+
V
CC
(+3.3 V)
o V
CC
R
X
o V
EE
R
X
o SD
o RD-
o RD+
R
X
1 µH
C1
1
2
3
4
5
Z = 50
V
CC
(+3.3 V)
10 nF
Z = 50
130
SD
82
82
82
LVPECL
RD-
Z = 50
Note: C1 = C2 = C3 = 10 nF or 100 nF
TERMINATE AT DEVICE INPUTS
Figure 8. Alternative Termination Circuits
7