2
I/O Pinout List
Pin
1
Name
16XCLK
(SIXTNCK)
Type
DIGIN
Function
Positive edge triggered input clock that is set to 16 times the data
transmission baud rate. The encode and decode schemes require this
signal. The signal is usually tied to a UART’s BAUDOUT signal. The
16XCLK may be provided by application circuitry if BAUDOUT is not
available. This signal is required when the internal clock is not used.
Negative edge triggered input signal that is normally tied to the SOUT
signal of the UART (serial data to be transmitted). Data is modulated
and output as IR_TXD.
Output signal normally tied to SIN signal of a UART (received serial
data). RCV is the demodulated output of IR_RVC.
Clock Multiplex Signal
Clock Multiplex Signal
Clock Multiplex Signal
Used to activate either the Internal or External Clock. A high on this
line activates the External clock (16XCLK) and a low activates the
Internal clock. When the External clock is activated, the internal
oscillator is put in POWERDOWN MODE.
Chip Ground
Active low signal used to reset the IrDA-SIR ENCODE & DECODE
state machine. This signal can be tied to POR (Power On Reset) or V
CC
.
Input from SIR optoelectronics. Input signal is a 3/16th or 1.6
µs
pulse
which is demodulated to generate RCV output signal.
This is the modulated TXD signal.
A high level on this input puts the chip into the monoshot transmit
mode. In this mode, when there is a negative transition on the TXD
input, a rising edge on the internal transmit modulation state machine
will activate a high pulse on IR_TXD for 6 crystal clock cycles. With a
3.6864 MHz crystal, this corresponds to 1.63
µs.
This mode cannot be
used in conjunction with the 16XCLK clock. It is meant to be used with
the external crystal clock. By default, this input pin is pulled to GND.
A high on this input puts only the internal oscillator cell (OSCII) in
POWERDOWN MODE. The cell is normally not powered down.
Oscillator Output
Oscillator Input
Power
2
/TXD
DIGIN
3
4
5
6
7
RCV
A0
A1
A2
CLK_SEL
DIGOUT
DIGIN
DIGIN
DIGIN
DIGIN
8
9
10
11
12
GND
/NRST
/IR_RCV
IR_TXD
PULSEMOD
DIGIN
DIGIN
DIGOUT
DIGIN
(with
pulldown)
13
POWERDN
14
15
16
OSCOUT
OSCIN
V
CC
DIGIN
(with
pulldown)
ANAOUT
ANAIN
Note:
There are two methods of putting the internal oscillator cell in POWERDOWN MODE. Whenever the CLKSEL Pin is asserted
high (External clock selected) the oscillator cell is automatically put in powerdown mode, or whenever the POWERDN Pin is asserted
high.
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