AIC1550
ꢀBLOCK DIAGRAM
BP
10
Chip Supply
0.75V
REF
VIN
Current AMP
.
VIN
+
SHDN
X 5
-
5
Slope
500KHz
RT
Q2
Q1
x1
Oscillator
Current Limit
Comparator
X20
Compensation
Frequency
Selection
+
REF
SYNC
-
PW M
Comparator
Phase
-
Compensation
LX
+
Error
AMP
Anti-
FB
Control Logic
.
FB
-
Shoot-
Through
REF
+
Q3
PW M/PFM
Control
Zero Cross
Comparator
-
GND
-
+
REF
+
PFM
Comparator
ꢀPIN DESCRIPTIONS
PIN 1: VIN-
Supply Voltage Input ranging from
+2.5V to +6.5V. Bypass with a
22µF capacitor.
PIN 6: SYNC/MODE-
Oscillator Sync and Low-Noise,
Mode-Control Input.
PIN 2: BP-
Supply Bypass Pin internally
connecting to VIN. Bypass with a
0.1µF capacitor.
SYNC/MODE
PWM Mode)
=
VIN (Forced
SYNC/MODE = GND (PWM/PFM
Mode)
PIN 3: SHDN - Active-Low,
Shutdown-Control
An
external
clock
signal
Input reducing supply current to
0.1µA in shutdown mode.
Feedback Input.
connecting to this pin allows LX
switching synchronization.
PIN 4: FB-
PIN 5: RT-
PIN 7: GND- Ground.
Frequency
Adjustable
Pin
connecting to GND through a
resistor to increase frequency.
(Refer to Fig. 15)
PIN 8: LX-
Inductor connecting to the Drains
of the Internal Power MOSFETs
9
AIC [ ANALOG INTERGRATIONS CORPORATION ]
