ASAHI KASEI
[AK4114]
SWITCHING CHARACTERISTICS (Continued)
(Ta=25°C; DVDD, AVDD2.7~3.6V, TVDD=2.7~5.5V; C
L
=20pF)
Parameter
Symbol
min
typ
2
Control Interface Timing (I C Bus mode):
-
fSCL
SCL Clock Frequency
4.7
tBUF
Bus Free Time Between Transmissions
4.0
tHD:STA
Start Condition Hold Time
(prior to first clock pulse)
4.7
tLOW
Clock Low Time
4.0
tHIGH
Clock High Time
4.7
tSU:STA
Setup Time for Repeated Start Condition
0
tHD:DAT
SDA Hold Time from SCL Falling
(Note 7)
250
tSU:DAT
SDA Setup Time from SCL Rising
-
tR
Rise Time of Both SDA and SCL Lines
-
tF
Fall Time of Both SDA and SCL Lines
4.0
tSU:STO
Setup Time for Stop Condition
-
Cb
Capacitive load on bus
Reset Timing
PDN Pulse Width
tPW
150
Note 7. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note 8. I
2
C is a registered trademark of Philips Semiconductors.
max
100
-
-
-
-
-
-
-
1000
300
-
400
Units
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
pF
ns
Purchase of Asahi Kasei Microsystems Co., Ltd I
2
C components conveys a license under the Philips
I
2
C patent to use the components in the I
2
C system, provided the system conform to the I
2
C
specifications defined by Philips.
MS0098-E-04
-8-
2004/03